Lines Matching refs:dv_sys_module_regs
92 while (!((readl(&dv_sys_module_regs->pll0_config) & PLL0_LOCK) in dm365_pll1_init()
167 while (!((readl(&dv_sys_module_regs->pll1_config) & PLL1_LOCK) in dm365_pll2_init()
178 &dv_sys_module_regs->peri_clkctl); in dm365_pll2_init()
186 clrbits_le32(&dv_sys_module_regs->vtpiocr, in dm365_ddr_setup()
190 setbits_le32(&dv_sys_module_regs->vtpiocr, VPTIO_CLRZ); in dm365_ddr_setup()
193 while (!(readl(&dv_sys_module_regs->vtpiocr) & VPTIO_RDY)) in dm365_ddr_setup()
197 setbits_le32(&dv_sys_module_regs->vtpiocr, VPTIO_IOPWRDN); in dm365_ddr_setup()
200 setbits_le32(&dv_sys_module_regs->vtpiocr, VPTIO_LOCK); in dm365_ddr_setup()
206 setbits_le32(&dv_sys_module_regs->vtpiocr, in dm365_ddr_setup()
247 setbits_le32(&dv_sys_module_regs->vpss_clkctl, in dm365_vpss_sync_reset()
306 clrbits_le32(&dv_sys_module_regs->vpss_clkctl, in dm365_wdt_flag_on()
376 clrbits_le32(&dv_sys_module_regs->pinmux[offset], mask); in dm365_pinmux_ctl()
377 setbits_le32(&dv_sys_module_regs->pinmux[offset], (mask & value)); in dm365_pinmux_ctl()