Lines Matching refs:clrbits_le32

40 		clrbits_le32(&davinci_syscfg_regs->cfgchip0, PLL_MASTER_LOCK);  in da850_pll_init()
46 	clrbits_le32(&reg->pllctl, PLLCTL_PLLENSRC);  in da850_pll_init()
48 	clrbits_le32(&reg->pllctl, PLLCTL_EXTCLKSRC);  in da850_pll_init()
51 	clrbits_le32(&reg->pllctl, PLLCTL_PLLEN);  in da850_pll_init()
66 	clrbits_le32(&reg->pllctl, PLLCTL_PLLRST);  in da850_pll_init()
76 	clrbits_le32(&reg->pllctl, PLLCTL_PLLPWRDN);  in da850_pll_init()
79 	clrbits_le32(&reg->pllctl, PLLCTL_PLLDIS);  in da850_pll_init()
172 		clrbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_POWERDWN);  in da850_ddr_setup()
173 		clrbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_LOCK);  in da850_ddr_setup()
175 		clrbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_CLKRZ);  in da850_ddr_setup()
191 		clrbits_le32(&davinci_syscfg1_regs->ddr_slew,  in da850_ddr_setup()
246 	clrbits_le32(&dv_ddr2_regs_ctrl->sdrcr,  in da850_ddr_setup()