Lines Matching +full:0 +full:xfffffd40
17 #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
24 #define ATMEL_ID_USART0 7 /* USART 0 */
28 #define ATMEL_ID_MCI0 11 /* High Speed Multimedia Card Interface 0 */
29 #define ATMEL_ID_TWI0 12 /* Two-Wire Interface 0 */
31 #define ATMEL_ID_SPI0 14 /* Serial Peripheral Interface 0 */
33 #define ATMEL_ID_SSC0 16 /* Synchronous Serial Controller 0 */
35 #define ATMEL_ID_TCB 18 /* Timer Counter 0, 1, 2, 3, 4 and 5 */
53 #define ATMEL_BASE_UDPHS 0xfff78000
54 #define ATMEL_BASE_TC0 0xfff7c000
55 #define ATMEL_BASE_TC1 0xfff7c040
56 #define ATMEL_BASE_TC2 0xfff7c080
57 #define ATMEL_BASE_MCI0 0xfff80000
58 #define ATMEL_BASE_TWI0 0xfff84000
59 #define ATMEL_BASE_TWI1 0xfff88000
60 #define ATMEL_BASE_USART0 0xfff8c000
61 #define ATMEL_BASE_USART1 0xfff90000
62 #define ATMEL_BASE_USART2 0xfff94000
63 #define ATMEL_BASE_USART3 0xfff98000
64 #define ATMEL_BASE_SSC0 0xfff9c000
65 #define ATMEL_BASE_SSC1 0xfffa0000
66 #define ATMEL_BASE_SPI0 0xfffa4000
67 #define ATMEL_BASE_SPI1 0xfffa8000
68 #define ATMEL_BASE_AC97C 0xfffac000
69 #define ATMEL_BASE_TSC 0xfffb0000
70 #define ATMEL_BASE_ISI 0xfffb4000
71 #define ATMEL_BASE_PWMC 0xfffb8000
72 #define ATMEL_BASE_EMAC 0xfffbc000
73 #define ATMEL_BASE_AES 0xfffc0000
74 #define ATMEL_BASE_TDES 0xfffc4000
75 #define ATMEL_BASE_SHA 0xfffc8000
76 #define ATMEL_BASE_TRNG 0xfffcc000
77 #define ATMEL_BASE_MCI1 0xfffd0000
78 #define ATMEL_BASE_TC3 0xfffd4000
79 #define ATMEL_BASE_TC4 0xfffd4040
80 #define ATMEL_BASE_TC5 0xfffd4080
81 /* Reserved: 0xfffd8000 - 0xffffe1ff */
86 #define ATMEL_BASE_SYS 0xffffe200
87 #define ATMEL_BASE_ECC 0xffffe200
88 #define ATMEL_BASE_DDRSDRC1 0xffffe400
89 #define ATMEL_BASE_DDRSDRC0 0xffffe600
90 #define ATMEL_BASE_SMC 0xffffe800
91 #define ATMEL_BASE_MATRIX 0xffffea00
92 #define ATMEL_BASE_DMA 0xffffec00
93 #define ATMEL_BASE_DBGU 0xffffee00
94 #define ATMEL_BASE_AIC 0xfffff000
95 #define ATMEL_BASE_PIOA 0xfffff200
96 #define ATMEL_BASE_PIOB 0xfffff400
97 #define ATMEL_BASE_PIOC 0xfffff600
98 #define ATMEL_BASE_PIOD 0xfffff800
99 #define ATMEL_BASE_PIOE 0xfffffa00
100 #define ATMEL_BASE_PMC 0xfffffc00
101 #define ATMEL_BASE_RSTC 0xfffffd00
102 #define ATMEL_BASE_SHDWN 0xfffffd10
103 #define ATMEL_BASE_RTT 0xfffffd20
104 #define ATMEL_BASE_PIT 0xfffffd30
105 #define ATMEL_BASE_WDT 0xfffffd40
106 #define ATMEL_BASE_SCKCR 0xfffffd50
107 #define ATMEL_BASE_GPBR 0xfffffd60
108 #define ATMEL_BASE_RTC 0xfffffdb0
109 /* Reserved: 0xfffffdc0 - 0xffffffff */
114 #define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */
115 #define ATMEL_BASE_ROM 0x00400000 /* Internal ROM base address */
116 #define ATMEL_BASE_LCDC 0x00500000 /* LCD Controller */
117 #define ATMEL_BASE_UDPHS_FIFO 0x00600000 /* USB Device HS controller */
118 #define ATMEL_BASE_HCI 0x00700000 /* USB Host controller (OHCI) */
119 #define ATMEL_BASE_EHCI 0x00800000 /* USB Host controller (EHCI) */
120 #define ATMEL_BASE_VDEC 0x00900000 /* Video Decoder Controller */
125 #define ATMEL_BASE_CS0 0x10000000
126 #define ATMEL_BASE_CS1 0x20000000
127 #define ATMEL_BASE_CS2 0x30000000
128 #define ATMEL_BASE_CS3 0x40000000
129 #define ATMEL_BASE_CS4 0x50000000
130 #define ATMEL_BASE_CS5 0x60000000
131 #define ATMEL_BASE_CS6 0x70000000
132 #define ATMEL_BASE_CS7 0x80000000
135 #define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c