Lines Matching refs:PLL
192 .word 0x00005B80 @ PLL
210 .word 0x000071C1 @ PLL
229 .word 0x00005B80 @ PLL
251 .word 0x000071C1 @ PLL
686 ldr r2, =0xC48066C0 @ load PLL parameter for 24Mhz CLKIN (330)
688 ldr r2, =0x93002400 @ load PLL parameter for 24Mhz CLKIN (396)
694 ldr r2, =0x930023E0 @ load PLL parameter for 24Mhz CLKIN (384)
696 ldr r2, =0x930023C0 @ load PLL parameter for 24Mhz CLKIN (372)
698 ldr r2, =0x930023A0 @ load PLL parameter for 24Mhz CLKIN (360)
708 ldr r2, =0xC4806680 @ load PLL parameter for 25Mhz CLKIN (331)
710 ldr r2, =0x930023E0 @ load PLL parameter for 25Mhz CLKIN (400)
716 ldr r2, =0x930023C0 @ load PLL parameter for 24Mhz CLKIN (387.5)
718 ldr r2, =0x930023A0 @ load PLL parameter for 24Mhz CLKIN (375)
720 ldr r2, =0x93002380 @ load PLL parameter for 24Mhz CLKIN (362.5)
730 ldr r0, =0x1e6e2020 @ M-PLL (DDR SDRAM) Frequency