include/asm/macro.h

148  * @tmp:    temporary register
154 .macro armv8_switch_to_el2_m, ep, flag, tmp
156 	mov	\tmp, #CPTR_EL2_RES1
157 	msr	cptr_el2, \tmp		/* Disable coprocessor traps to EL2 */
168 	ldr	\tmp, =(SCTLR_EL2_RES1 | SCTLR_EL2_EE_LE |\
172 	msr	sctlr_el2, \tmp
174 	mov	\tmp, sp
175 	msr	sp_el2, \tmp		/* Migrate SP */
176 	mrs	\tmp, vbar_el3
177 	msr	vbar_el2, \tmp		/* Migrate VBAR */
189 	ldr	\tmp, =(SCR_EL3_RW_AARCH64 | SCR_EL3_HCE_EN |\
192 	ldr	\tmp, =(SCR_EL3_RW_AARCH64 | SCR_EL3_HCE_EN |\
198 	orr	\tmp, \tmp, #SCR_EL3_EA_EN
200 	msr	scr_el3, \tmp
203 	ldr	\tmp, =(SPSR_EL_DEBUG_MASK | SPSR_EL_SERR_MASK |\
206 	msr	spsr_el3, \tmp
215 	ldr	\tmp, =(SCR_EL3_RW_AARCH32 | SCR_EL3_HCE_EN |\
218 	msr	scr_el3, \tmp
221 	ldr     \tmp, =(SPSR_EL_END_LE | SPSR_EL_ASYN_MASK |\
225 	msr	spsr_el3, \tmp
235  * @tmp:    temporary register
241 .macro armv8_switch_to_el1_m, ep, flag, tmp
243 	mrs	\tmp, cnthctl_el2
245 	orr	\tmp, \tmp, #(CNTHCTL_EL2_EL1PCEN_EN |\
247 	msr	cnthctl_el2, \tmp
251 	mrs	\tmp, midr_el1
252 	msr	vpidr_el2, \tmp
253 	mrs	\tmp, mpidr_el1
254 	msr	vmpidr_el2, \tmp
257 	mov	\tmp, #CPTR_EL2_RES1
258 	msr	cptr_el2, \tmp		/* Disable coprocessor traps to EL2 */
260 	mov	\tmp, #CPACR_EL1_FPEN_EN
261 	msr	cpacr_el1, \tmp		/* Enable FP/SIMD at EL1 */
270 	ldr	\tmp, =(SCTLR_EL1_RES1 | SCTLR_EL1_UCI_DIS |\
279 	msr	sctlr_el1, \tmp
281 	mov	\tmp, sp
282 	msr	sp_el1, \tmp		/* Migrate SP */
283 	mrs	\tmp, vbar_el2
284 	msr	vbar_el1, \tmp		/* Migrate VBAR */
291 	ldr	\tmp, =(HCR_EL2_RW_AARCH64 | HCR_EL2_HCD_DIS)
292 	msr	hcr_el2, \tmp
295 	ldr	\tmp, =(SPSR_EL_DEBUG_MASK | SPSR_EL_SERR_MASK |\
298 	msr	spsr_el2, \tmp
304 	ldr	\tmp, =(HCR_EL2_RW_AARCH32 | HCR_EL2_HCD_DIS)
305 	msr	hcr_el2, \tmp
308 	ldr	\tmp, =(SPSR_EL_END_LE | SPSR_EL_ASYN_MASK |\
312 	msr     spsr_el2, \tmp