include/asm/macro.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
3  * include/asm-arm/macro.h
5  * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
20  * Registers r4 and r5 are used, any data in these registers are
24  * caches are enabled or on a multi-core system.
29 	ldr	r5, =\data
30 	str	r5, [r4]
35 	ldrh	r5, =\data
36 	strh	r5, [r4]
41 	ldrb	r5, =\data
42 	strb	r5, [r4]
81  * Branch if current processor is a Cortex-A57 core.
87 	cmp	\xreg, #0xD07		/* Cortex-A57 MPCore processor. */
92  * Branch if current processor is a Cortex-A53 core.
98 	cmp	\xreg, #0xD03		/* Cortex-A53 MPCore processor. */
108 	/* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
130 	/* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
150  * For loading 32-bit OS, x1 is machine nr and x2 is ftaddr.
151  * For loading 64-bit OS, x0 is physical address to the FDT blob.
165 	 * and RES0 bits (31,30,27,26,24,21,20,17,15-13,10-6) +
185 	 * RES1 (Bits[5:4]) | Non-secure EL0/EL1.
213 	 * SMD | RES1 (Bits[5:4]) | Non-secure EL0/EL1.
237  * For loading 32-bit OS, x1 is machine nr and x2 is ftaddr.
238  * For loading 64-bit OS, x0 is physical address to the FDT blob.