Lines Matching full:16
58 #define GPMI_CTRL0_ADDRESS_INCREMENT (1 << 16)
62 #define GPMI_COMPARE_MASK_MASK (0xffff << 16)
63 #define GPMI_COMPARE_MASK_OFFSET 16
67 #define GPMI_ECCCTRL_HANDLE_MASK (0xffff << 16)
68 #define GPMI_ECCCTRL_HANDLE_OFFSET 16
95 #define GPMI_CTRL1_HALF_PERIOD (1 << 16)
110 #define GPMI_TIMING0_ADDRESS_SETUP_MASK (0xff << 16)
111 #define GPMI_TIMING0_ADDRESS_SETUP_OFFSET 16
117 #define GPMI_TIMING1_DEVICE_BUSY_TIMEOUT_MASK (0xffff << 16)
118 #define GPMI_TIMING1_DEVICE_BUSY_TIMEOUT_OFFSET 16
122 #define GPMI_TIMING2_UDMA_ENV_MASK (0xff << 16)
123 #define GPMI_TIMING2_UDMA_ENV_OFFSET 16
134 #define GPMI_STAT_RDY_TIMEOUT_MASK (0xff << 16)
135 #define GPMI_STAT_RDY_TIMEOUT_OFFSET 16
152 #define GPMI_DEBUG_DMA_SENSE_MASK (0xff << 16)
153 #define GPMI_DEBUG_DMA_SENSE_OFFSET 16
161 #define GPMI_VERSION_MINOR_MASK (0xff << 16)
162 #define GPMI_VERSION_MINOR_OFFSET 16
179 #define GPMI_DEBUG2_MAIN_STATE_MASK (0xf << 16)
180 #define GPMI_DEBUG2_MAIN_STATE_OFFSET 16
181 #define GPMI_DEBUG2_MAIN_STATE_MSM_IDLE (0x0 << 16)
182 #define GPMI_DEBUG2_MAIN_STATE_MSM_BYTCNT (0x1 << 16)
183 #define GPMI_DEBUG2_MAIN_STATE_MSM_WAITFE (0x2 << 16)
184 #define GPMI_DEBUG2_MAIN_STATE_MSM_WAITFR (0x3 << 16)
185 #define GPMI_DEBUG2_MAIN_STATE_MSM_DMAREQ (0x4 << 16)
186 #define GPMI_DEBUG2_MAIN_STATE_MSM_DMAACK (0x5 << 16)
187 #define GPMI_DEBUG2_MAIN_STATE_MSM_WAITFF (0x6 << 16)
188 #define GPMI_DEBUG2_MAIN_STATE_MSM_LDFIFO (0x7 << 16)
189 #define GPMI_DEBUG2_MAIN_STATE_MSM_LDDMAR (0x8 << 16)
190 #define GPMI_DEBUG2_MAIN_STATE_MSM_RDCMP (0x9 << 16)
191 #define GPMI_DEBUG2_MAIN_STATE_MSM_DONE (0xa << 16)
203 #define GPMI_DEBUG3_APB_WORD_CNTR_MASK (0xffff << 16)
204 #define GPMI_DEBUG3_APB_WORD_CNTR_OFFSET 16