118 #define CCM_CCR_OSCNT(v)			((v) & 0xff)  argument
122 #define CCM_CCSR_PLL2_PFD_CLK_SEL(v)		(((v) & 0x7) << 19)  argument
126 #define CCM_CCSR_PLL1_PFD_CLK_SEL(v)		(((v) & 0x7) << 16)  argument
131 #define CCM_CCSR_PLL2_PFD1_EN			(1 << 12)
137 #define CCM_CCSR_DDRC_CLK_SEL(v)		((v) << 6)  argument
138 #define CCM_CCSR_FAST_CLK_SEL(v)		((v) << 5)  argument
142 #define CCM_CCSR_SYS_CLK_SEL(v)			((v) & 0x7)  argument
146 #define CCM_CACRR_IPG_CLK_DIV(v)		(((v) & 0x3) << 11)  argument
149 #define CCM_CACRR_BUS_CLK_DIV(v)		(((v) & 0x7) << 3)  argument
152 #define CCM_CACRR_ARM_CLK_DIV(v)		((v) & 0x7)  argument
159 #define CCM_CSCMR1_QSPI0_CLK_SEL(v)		(((v) & 0x3) << 22)  argument
162 #define CCM_CSCMR1_ESDHC1_CLK_SEL(v)		(((v) & 0x3) << 18)  argument
163 #define CCM_CSCMR1_NFC_CLK_SEL_OFFSET		12
164 #define CCM_CSCMR1_NFC_CLK_SEL_MASK		(0x3 << 12)
165 #define CCM_CSCMR1_NFC_CLK_SEL(v)		(((v) & 0x3) << 12)  argument
174 #define CCM_CSCDR2_NFC_FRAC_DIV(v)		(((v) & 0xf) << 4)  argument
179 #define CCM_CSCDR2_ESDHC1_CLK_DIV(v)		(((v) & 0xf) << 20)  argument
183 #define CCM_CSCDR3_DCU1_DIV(v)			(((v) & 0x7) << 20)  argument
186 #define CCM_CSCDR3_DCU0_DIV(v)			(((v) & 0x7) << 16)  argument
190 #define CCM_CSCDR3_NFC_PRE_DIV(v)		(((v) & 0x7) << 13)  argument
192 #define CCM_CSCDR3_QSPI0_DIV(v)			((v) << 3)  argument
193 #define CCM_CSCDR3_QSPI0_X2_DIV(v)		((v) << 2)  argument
194 #define CCM_CSCDR3_QSPI0_X4_DIV(v)		((v) & 0x3)  argument
198 #define CCM_CSCMR2_RMII_CLK_SEL(v)		(((v) & 0x3) << 4)  argument
222 #define CCM_CCGR4_I2C0_CTRL_MASK		(0x3 << 12)
233 #define CCM_CCGR10_I2C2_CTRL_MASK		(0x3 << 12)
238 #define ANADIG_PLL7_CTRL_POWERDOWN      (1 << 12)
242 #define ANADIG_PLL5_CTRL_POWERDOWN              (1 << 12)
246 #define ANADIG_PLL3_CTRL_POWERDOWN      (1 << 12)
249 #define ANADIG_PLL2_CTRL_POWERDOWN		(1 << 12)
252 #define ANADIG_PLL1_CTRL_POWERDOWN		(1 << 12)