Lines Matching +full:8 +full:- +full:ch
1 /* SPDX-License-Identifier: GPL-2.0+ */
24 * [8] bk_ch0
34 #define SYS_REG_ROW_3_4_SHIFT(ch) (30 + (ch)) argument
36 #define SYS_REG_CHINFO_SHIFT(ch) (28 + (ch)) argument
37 #define SYS_REG_RANK_SHIFT(ch) (11 + (ch) * 16) argument
39 #define SYS_REG_COL_SHIFT(ch) (9 + (ch) * 16) argument
41 #define SYS_REG_BK_SHIFT(ch) (8 + (ch) * 16) argument
43 #define SYS_REG_CS0_ROW_SHIFT(ch) (6 + (ch) * 16) argument
45 #define SYS_REG_CS1_ROW_SHIFT(ch) (4 + (ch) * 16) argument
47 #define SYS_REG_BW_SHIFT(ch) (2 + (ch) * 16) argument
49 #define SYS_REG_DBW_SHIFT(ch) ((ch) * 16) argument
55 /* Called by U-Boot board_init_r for Rockchip SoCs */