Lines Matching full:bit
10 #define RK3288_LVDS_CH0_REG0_LVDS_EN BIT(7)
11 #define RK3288_LVDS_CH0_REG0_TTL_EN BIT(6)
12 #define RK3288_LVDS_CH0_REG0_LANECK_EN BIT(5)
13 #define RK3288_LVDS_CH0_REG0_LANE4_EN BIT(4)
14 #define RK3288_LVDS_CH0_REG0_LANE3_EN BIT(3)
15 #define RK3288_LVDS_CH0_REG0_LANE2_EN BIT(2)
16 #define RK3288_LVDS_CH0_REG0_LANE1_EN BIT(1)
17 #define RK3288_LVDS_CH0_REG0_LANE0_EN BIT(0)
20 #define RK3288_LVDS_CH0_REG1_LANECK_BIAS BIT(5)
21 #define RK3288_LVDS_CH0_REG1_LANE4_BIAS BIT(4)
22 #define RK3288_LVDS_CH0_REG1_LANE3_BIAS BIT(3)
23 #define RK3288_LVDS_CH0_REG1_LANE2_BIAS BIT(2)
24 #define RK3288_LVDS_CH0_REG1_LANE1_BIAS BIT(1)
25 #define RK3288_LVDS_CH0_REG1_LANE0_BIAS BIT(0)
28 #define RK3288_LVDS_CH0_REG2_RESERVE_ON BIT(7)
29 #define RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE BIT(6)
30 #define RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE BIT(5)
31 #define RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE BIT(4)
32 #define RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE BIT(3)
33 #define RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE BIT(2)
34 #define RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE BIT(1)
35 #define RK3288_LVDS_CH0_REG2_PLL_FBDIV8 BIT(0)
41 #define RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE BIT(5)
42 #define RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE BIT(4)
43 #define RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE BIT(3)
44 #define RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE BIT(2)
45 #define RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE BIT(1)
46 #define RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE BIT(0)
49 #define RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA BIT(5)
50 #define RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA BIT(4)
51 #define RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA BIT(3)
52 #define RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA BIT(2)
53 #define RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA BIT(1)
54 #define RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA BIT(0)
73 (_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0)
79 #define RK3288_LVDS_SOC_CON6_SEL_VOP_LIT BIT(3)