asm/arch-rockchip/grf_rk322x.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
31 	unsigned int reserved1[4];
33 	unsigned int reserved2[(0x100 - 0x50) / 4 - 1];
34 	unsigned int gpio0_p[4];
35 	unsigned int gpio1_p[4];
36 	unsigned int gpio2_p[4];
37 	unsigned int gpio3_p[4];
38 	unsigned int reserved3[(0x200 - 0x13c) / 4 - 1];
39 	unsigned int gpio0_e[4];
40 	unsigned int gpio1_e[4];
41 	unsigned int gpio2_e[4];
42 	unsigned int gpio3_e[4];
43 	unsigned int reserved4[(0x400 - 0x23c) / 4 - 1];
45 	unsigned int reserved5[(0x480 - 0x418) / 4 - 1];
48 	unsigned int reserved6[(0x500 - 0x48c) / 4 - 1];
49 	unsigned int cpu_con[4];
50 	unsigned int reserved7[4];
52 	unsigned int reserved8[(0x5c8 - 0x524) / 4 - 1];
54 	unsigned int reserved9[(0x604 - 0x5e4) / 4 - 1];
56 	unsigned int reserved10[(0x680 - 0x604) / 4 - 1];
58 	unsigned int reserved11[(0x690 - 0x684) / 4 - 1];
60 	unsigned int reserved12[(0x6a0 - 0x694) / 4 - 1];
62 	unsigned int reserved13[(0x6b0 - 0x6a4) / 4 - 1];
64 	unsigned int reserved14[(0x700 - 0x6b0) / 4 - 1];
70 	unsigned int reserved17[(0x760 - 0x728) / 4 - 1];
72 	unsigned int reserved18[(0x800 - 0x7c8) / 4 - 1];
74 	unsigned int reserved19[(0x880 - 0x868) / 4 - 1];
77 	unsigned int reserved20[(0x900 - 0x884) / 4 - 1];
79 	unsigned int reserved21[(0xb00 - 0x904) / 4 - 1];
80 	unsigned int macphy_con[4];
87 	unsigned int busdmac_con[4];
93 	MACPHY_CFG_ENABLE_MASK  = 1 << MACPHY_CFG_ENABLE_SHIFT,