Lines Matching +full:2 +full:mhz
24 u32 pmucru_clkfrac_con[2];
28 u32 pmucru_softrst_con[2];
29 u32 reserved4[2];
30 u32 pmucru_rstnhold_con[2];
31 u32 reserved5[2];
32 u32 pmucru_gatedis_con[2];
38 u32 reserved[2];
40 u32 reserved1[2];
42 u32 reserved2[2];
44 u32 reserved3[2];
46 u32 reserved4[2];
48 u32 reserved5[2];
64 u32 sdmmc_con[2];
65 u32 sdio0_con[2];
66 u32 sdio1_con[2];
69 #define MHz 1000000 macro
71 #define OSC_HZ (24*MHz)
72 #define LPLL_HZ (600*MHz)
73 #define BPLL_HZ (600*MHz)
74 #define GPLL_HZ (594*MHz)
75 #define CPLL_HZ (384*MHz)
76 #define PPLL_HZ (676*MHz)
78 #define PMU_PCLK_HZ (48*MHz)
80 #define ACLKM_CORE_L_HZ (300*MHz)
81 #define ATCLK_CORE_L_HZ (300*MHz)
82 #define PCLK_DBG_L_HZ (100*MHz)
84 #define ACLKM_CORE_B_HZ (300*MHz)
85 #define ATCLK_CORE_B_HZ (300*MHz)
86 #define PCLK_DBG_B_HZ (100*MHz)