Lines Matching +full:0 +full:x0064

17 #define OFF_OUT_PTD     (0 << 10)
20 #define OFF_OUT (0 << 10)
23 #define OFF_PD (0 << 12)
24 #define OFF_PU (0 << 12)
25 #define OFF_OUT_PTD (0 << 10)
26 #define OFF_OUT_PTU (0 << 10)
27 #define OFF_IN (0 << 10)
28 #define OFF_OUT (0 << 10)
29 #define OFF_EN (0 << 9)
33 #define IDIS (0 << 8)
37 #define DIS (0 << 3)
39 #define M0 0
56 #define OFF_IN_PD 0
57 #define OFF_IN_PU 0
58 #define OFF_OUT_PD 0
59 #define OFF_OUT_PU 0
62 #define CORE_REVISION 0x0000
63 #define CORE_HWINFO 0x0004
64 #define CORE_SYSCONFIG 0x0010
65 #define EMMC_CLK 0x0040
66 #define EMMC_CMD 0x0042
67 #define EMMC_DATA0 0x0044
68 #define EMMC_DATA1 0x0046
69 #define EMMC_DATA2 0x0048
70 #define EMMC_DATA3 0x004a
71 #define EMMC_DATA4 0x004c
72 #define EMMC_DATA5 0x004e
73 #define EMMC_DATA6 0x0050
74 #define EMMC_DATA7 0x0052
75 #define C2C_CLKOUT0 0x0054
76 #define C2C_CLKOUT1 0x0056
77 #define C2C_CLKIN0 0x0058
78 #define C2C_CLKIN1 0x005a
79 #define C2C_DATAIN0 0x005c
80 #define C2C_DATAIN1 0x005e
81 #define C2C_DATAIN2 0x0060
82 #define C2C_DATAIN3 0x0062
83 #define C2C_DATAIN4 0x0064
84 #define C2C_DATAIN5 0x0066
85 #define C2C_DATAIN6 0x0068
86 #define C2C_DATAIN7 0x006a
87 #define C2C_DATAOUT0 0x006c
88 #define C2C_DATAOUT1 0x006e
89 #define C2C_DATAOUT2 0x0070
90 #define C2C_DATAOUT3 0x0072
91 #define C2C_DATAOUT4 0x0074
92 #define C2C_DATAOUT5 0x0076
93 #define C2C_DATAOUT6 0x0078
94 #define C2C_DATAOUT7 0x007a
95 #define C2C_DATA8 0x007c
96 #define C2C_DATA9 0x007e
97 #define C2C_DATA10 0x0080
98 #define C2C_DATA11 0x0082
99 #define C2C_DATA12 0x0084
100 #define C2C_DATA13 0x0086
101 #define C2C_DATA14 0x0088
102 #define C2C_DATA15 0x008a
103 #define LLIA_WAKEREQOUT 0x008c
104 #define LLIB_WAKEREQOUT 0x008e
105 #define HSI1_ACREADY 0x0090
106 #define HSI1_CAREADY 0x0092
107 #define HSI1_ACWAKE 0x0094
108 #define HSI1_CAWAKE 0x0096
109 #define HSI1_ACFLAG 0x0098
110 #define HSI1_ACDATA 0x009a
111 #define HSI1_CAFLAG 0x009c
112 #define HSI1_CADATA 0x009e
113 #define UART1_TX 0x00a0
114 #define UART1_CTS 0x00a2
115 #define UART1_RX 0x00a4
116 #define UART1_RTS 0x00a6
117 #define HSI2_CAREADY 0x00a8
118 #define HSI2_ACREADY 0x00aa
119 #define HSI2_CAWAKE 0x00ac
120 #define HSI2_ACWAKE 0x00ae
121 #define HSI2_CAFLAG 0x00b0
122 #define HSI2_CADATA 0x00b2
123 #define HSI2_ACFLAG 0x00b4
124 #define HSI2_ACDATA 0x00b6
125 #define UART2_RTS 0x00b8
126 #define UART2_CTS 0x00ba
127 #define UART2_RX 0x00bc
128 #define UART2_TX 0x00be
129 #define USBB1_HSIC_STROBE 0x00c0
130 #define USBB1_HSIC_DATA 0x00c2
131 #define USBB2_HSIC_STROBE 0x00c4
132 #define USBB2_HSIC_DATA 0x00c6
133 #define TIMER10_PWM_EVT 0x00c8
134 #define DSIPORTA_TE0 0x00ca
135 #define DSIPORTA_LANE0X 0x00cc
136 #define DSIPORTA_LANE0Y 0x00ce
137 #define DSIPORTA_LANE1X 0x00d0
138 #define DSIPORTA_LANE1Y 0x00d2
139 #define DSIPORTA_LANE2X 0x00d4
140 #define DSIPORTA_LANE2Y 0x00d6
141 #define DSIPORTA_LANE3X 0x00d8
142 #define DSIPORTA_LANE3Y 0x00da
143 #define DSIPORTA_LANE4X 0x00dc
144 #define DSIPORTA_LANE4Y 0x00de
145 #define DSIPORTC_LANE0X 0x00e0
146 #define DSIPORTC_LANE0Y 0x00e2
147 #define DSIPORTC_LANE1X 0x00e4
148 #define DSIPORTC_LANE1Y 0x00e6
149 #define DSIPORTC_LANE2X 0x00e8
150 #define DSIPORTC_LANE2Y 0x00ea
151 #define DSIPORTC_LANE3X 0x00ec
152 #define DSIPORTC_LANE3Y 0x00ee
153 #define DSIPORTC_LANE4X 0x00f0
154 #define DSIPORTC_LANE4Y 0x00f2
155 #define DSIPORTC_TE0 0x00f4
156 #define TIMER9_PWM_EVT 0x00f6
157 #define I2C4_SCL 0x00f8
158 #define I2C4_SDA 0x00fa
159 #define MCSPI2_CLK 0x00fc
160 #define MCSPI2_SIMO 0x00fe
161 #define MCSPI2_SOMI 0x0100
162 #define MCSPI2_CS0 0x0102
163 #define RFBI_DATA15 0x0104
164 #define RFBI_DATA14 0x0106
165 #define RFBI_DATA13 0x0108
166 #define RFBI_DATA12 0x010a
167 #define RFBI_DATA11 0x010c
168 #define RFBI_DATA10 0x010e
169 #define RFBI_DATA9 0x0110
170 #define RFBI_DATA8 0x0112
171 #define RFBI_DATA7 0x0114
172 #define RFBI_DATA6 0x0116
173 #define RFBI_DATA5 0x0118
174 #define RFBI_DATA4 0x011a
175 #define RFBI_DATA3 0x011c
176 #define RFBI_DATA2 0x011e
177 #define RFBI_DATA1 0x0120
178 #define RFBI_DATA0 0x0122
179 #define RFBI_WE 0x0124
180 #define RFBI_CS0 0x0126
181 #define RFBI_A0 0x0128
182 #define RFBI_RE 0x012a
183 #define RFBI_HSYNC0 0x012c
184 #define RFBI_TE_VSYNC0 0x012e
185 #define GPIO6_182 0x0130
186 #define GPIO6_183 0x0132
187 #define GPIO6_184 0x0134
188 #define GPIO6_185 0x0136
189 #define GPIO6_186 0x0138
190 #define GPIO6_187 0x013a
191 #define HDMI_CEC 0x013c
192 #define HDMI_HPD 0x013e
193 #define HDMI_DDC_SCL 0x0140
194 #define HDMI_DDC_SDA 0x0142
195 #define CSIPORTC_LANE0X 0x0144
196 #define CSIPORTC_LANE0Y 0x0146
197 #define CSIPORTC_LANE1X 0x0148
198 #define CSIPORTC_LANE1Y 0x014a
199 #define CSIPORTB_LANE0X 0x014c
200 #define CSIPORTB_LANE0Y 0x014e
201 #define CSIPORTB_LANE1X 0x0150
202 #define CSIPORTB_LANE1Y 0x0152
203 #define CSIPORTB_LANE2X 0x0154
204 #define CSIPORTB_LANE2Y 0x0156
205 #define CSIPORTA_LANE0X 0x0158
206 #define CSIPORTA_LANE0Y 0x015a
207 #define CSIPORTA_LANE1X 0x015c
208 #define CSIPORTA_LANE1Y 0x015e
209 #define CSIPORTA_LANE2X 0x0160
210 #define CSIPORTA_LANE2Y 0x0162
211 #define CSIPORTA_LANE3X 0x0164
212 #define CSIPORTA_LANE3Y 0x0166
213 #define CSIPORTA_LANE4X 0x0168
214 #define CSIPORTA_LANE4Y 0x016a
215 #define CAM_SHUTTER 0x016c
216 #define CAM_STROBE 0x016e
217 #define CAM_GLOBALRESET 0x0170
218 #define TIMER11_PWM_EVT 0x0172
219 #define TIMER5_PWM_EVT 0x0174
220 #define TIMER6_PWM_EVT 0x0176
221 #define TIMER8_PWM_EVT 0x0178
222 #define I2C3_SCL 0x017a
223 #define I2C3_SDA 0x017c
224 #define GPIO8_233 0x017e
225 #define GPIO8_234 0x0180
226 #define ABE_CLKS 0x0182
227 #define ABEDMIC_DIN1 0x0184
228 #define ABEDMIC_DIN2 0x0186
229 #define ABEDMIC_DIN3 0x0188
230 #define ABEDMIC_CLK1 0x018a
231 #define ABEDMIC_CLK2 0x018c
232 #define ABEDMIC_CLK3 0x018e
233 #define ABESLIMBUS1_CLOCK 0x0190
234 #define ABESLIMBUS1_DATA 0x0192
235 #define ABEMCBSP2_DR 0x0194
236 #define ABEMCBSP2_DX 0x0196
237 #define ABEMCBSP2_FSX 0x0198
238 #define ABEMCBSP2_CLKX 0x019a
239 #define ABEMCPDM_UL_DATA 0x019c
240 #define ABEMCPDM_DL_DATA 0x019e
241 #define ABEMCPDM_FRAME 0x01a0
242 #define ABEMCPDM_LB_CLK 0x01a2
243 #define WLSDIO_CLK 0x01a4
244 #define WLSDIO_CMD 0x01a6
245 #define WLSDIO_DATA0 0x01a8
246 #define WLSDIO_DATA1 0x01aa
247 #define WLSDIO_DATA2 0x01ac
248 #define WLSDIO_DATA3 0x01ae
249 #define UART5_RX 0x01b0
250 #define UART5_TX 0x01b2
251 #define UART5_CTS 0x01b4
252 #define UART5_RTS 0x01b6
253 #define I2C2_SCL 0x01b8
254 #define I2C2_SDA 0x01ba
255 #define MCSPI1_CLK 0x01bc
256 #define MCSPI1_SOMI 0x01be
257 #define MCSPI1_SIMO 0x01c0
258 #define MCSPI1_CS0 0x01c2
259 #define MCSPI1_CS1 0x01c4
260 #define I2C5_SCL 0x01c6
261 #define I2C5_SDA 0x01c8
262 #define PERSLIMBUS2_CLOCK 0x01ca
263 #define PERSLIMBUS2_DATA 0x01cc
264 #define UART6_TX 0x01ce
265 #define UART6_RX 0x01d0
266 #define UART6_CTS 0x01d2
267 #define UART6_RTS 0x01d4
268 #define UART3_CTS_RCTX 0x01d6
269 #define UART3_RTS_IRSD 0x01d8
270 #define UART3_TX_IRTX 0x01da
271 #define UART3_RX_IRRX 0x01dc
272 #define USBB3_HSIC_STROBE 0x01de
273 #define USBB3_HSIC_DATA 0x01e0
274 #define SDCARD_CLK 0x01e2
275 #define SDCARD_CMD 0x01e4
276 #define SDCARD_DATA2 0x01e6
277 #define SDCARD_DATA3 0x01e8
278 #define SDCARD_DATA0 0x01ea
279 #define SDCARD_DATA1 0x01ec
280 #define USBD0_HS_DP 0x01ee
281 #define USBD0_HS_DM 0x01f0
282 #define I2C1_PMIC_SCL 0x01f2
283 #define I2C1_PMIC_SDA 0x01f4
284 #define USBD0_SS_RX 0x01f6
286 #define LLIA_WAKEREQIN 0x0040
287 #define LLIB_WAKEREQIN 0x0042
288 #define DRM_EMU0 0x0044
289 #define DRM_EMU1 0x0046
290 #define JTAG_NTRST 0x0048
291 #define JTAG_TCK 0x004a
292 #define JTAG_RTCK 0x004c
293 #define JTAG_TMSC 0x004e
294 #define JTAG_TDI 0x0050
295 #define JTAG_TDO 0x0052
296 #define SYS_32K 0x0054
297 #define FREF_CLK_IOREQ 0x0056
298 #define FREF_CLK0_OUT 0x0058
299 #define FREF_CLK1_OUT 0x005a
300 #define FREF_CLK2_OUT 0x005c
301 #define FREF_CLK2_REQ 0x005e
302 #define FREF_CLK1_REQ 0x0060
303 #define SYS_NRESPWRON 0x0062
304 #define SYS_NRESWARM 0x0064
305 #define SYS_PWR_REQ 0x0066
306 #define SYS_NIRQ1 0x0068
307 #define SYS_NIRQ2 0x006a
308 #define SR_PMIC_SCL 0x006c
309 #define SR_PMIC_SDA 0x006e
310 #define SYS_BOOT0 0x0070
311 #define SYS_BOOT1 0x0072
312 #define SYS_BOOT2 0x0074
313 #define SYS_BOOT3 0x0076
314 #define SYS_BOOT4 0x0078
315 #define SYS_BOOT5 0x007a