Lines Matching defs:mxs_digctl_regs
14 struct mxs_digctl_regs { struct
22 uint32_t reserved_writeonce[3];
26 uint32_t reserved_entropy[3];
27 uint32_t hw_digctl_entropy_latched; /* 0x0a0 */
28 uint32_t reserved_entropy_latched[3];
30 uint32_t reserved1[4];
34 uint32_t reserved_hw_digctl_dbgrd[3];
35 uint32_t hw_digctl_dbg; /* 0x0e0 */
36 uint32_t reserved_hw_digctl_dbg[3];
38 uint32_t reserved2[4];
58 uint32_t hw_digctl_scratch0; /* 0x280 */
59 uint32_t reserved_hw_digctl_scratch0[3];
60 uint32_t hw_digctl_scratch1; /* 0x290 */
61 uint32_t reserved_hw_digctl_scratch1[3];
62 uint32_t hw_digctl_armcache; /* 0x2a0 */
63 uint32_t reserved_hw_digctl_armcache[3];
66 uint32_t reserved_hw_digctl_debug_trap_l0_addr_low[3];
67 uint32_t hw_digctl_debug_trap_l0_addr_high; /* 0x2d0 */
68 uint32_t reserved_hw_digctl_debug_trap_l0_addr_high[3];
69 uint32_t hw_digctl_debug_trap_l3_addr_low; /* 0x2e0 */
70 uint32_t reserved_hw_digctl_debug_trap_l3_addr_low[3];
71 uint32_t hw_digctl_debug_trap_l3_addr_high; /* 0x2f0 */
72 uint32_t reserved_hw_digctl_debug_trap_l3_addr_high[3];
73 uint32_t hw_digctl_fsl; /* 0x300 */
74 uint32_t reserved_hw_digctl_fsl[3];
75 uint32_t hw_digctl_chipid; /* 0x310 */
76 uint32_t reserved_hw_digctl_chipid[3];
78 uint32_t reserved4[4];
80 uint32_t hw_digctl_ahb_stats_select; /* 0x330 */
81 uint32_t reserved_hw_digctl_ahb_stats_select[3];
83 uint32_t reserved5[12];
85 uint32_t hw_digctl_l1_ahb_active_cycles; /* 0x370 */
86 uint32_t reserved_hw_digctl_l1_ahb_active_cycles[3];
87 uint32_t hw_digctl_l1_ahb_data_stalled; /* 0x380 */
88 uint32_t reserved_hw_digctl_l1_ahb_data_stalled[3];
89 uint32_t hw_digctl_l1_ahb_data_cycles; /* 0x390 */
90 uint32_t reserved_hw_digctl_l1_ahb_data_cycles[3];
91 uint32_t hw_digctl_l2_ahb_active_cycles; /* 0x3a0 */
92 uint32_t reserved_hw_digctl_l2_ahb_active_cycles[3];
93 uint32_t hw_digctl_l2_ahb_data_stalled; /* 0x3b0 */
94 uint32_t reserved_hw_digctl_l2_ahb_data_stalled[3];
95 uint32_t hw_digctl_l2_ahb_data_cycles; /* 0x3c0 */
96 uint32_t reserved_hw_digctl_l2_ahb_data_cycles[3];
97 uint32_t hw_digctl_l3_ahb_active_cycles; /* 0x3d0 */
98 uint32_t reserved_hw_digctl_l3_ahb_active_cycles[3];
99 uint32_t hw_digctl_l3_ahb_data_stalled; /* 0x3e0 */
100 uint32_t reserved_hw_digctl_l3_ahb_data_stalled[3];
101 uint32_t hw_digctl_l3_ahb_data_cycles; /* 0x3f0 */
102 uint32_t reserved_hw_digctl_l3_ahb_data_cycles[3];
104 uint32_t reserved6[64];
106 uint32_t hw_digctl_mpte0_loc; /* 0x500 */
107 uint32_t reserved_hw_digctl_mpte0_loc[3];
108 uint32_t hw_digctl_mpte1_loc; /* 0x510 */
109 uint32_t reserved_hw_digctl_mpte1_loc[3];
110 uint32_t hw_digctl_mpte2_loc; /* 0x520 */
111 uint32_t reserved_hw_digctl_mpte2_loc[3];
112 uint32_t hw_digctl_mpte3_loc; /* 0x530 */
113 uint32_t reserved_hw_digctl_mpte3_loc[3];
114 uint32_t hw_digctl_mpte4_loc; /* 0x540 */
115 uint32_t reserved_hw_digctl_mpte4_loc[3];
116 uint32_t hw_digctl_mpte5_loc; /* 0x550 */
117 uint32_t reserved_hw_digctl_mpte5_loc[3];
118 uint32_t hw_digctl_mpte6_loc; /* 0x560 */
119 uint32_t reserved_hw_digctl_mpte6_loc[3];
120 uint32_t hw_digctl_mpte7_loc; /* 0x570 */
121 uint32_t reserved_hw_digctl_mpte7_loc[3];
122 uint32_t hw_digctl_mpte8_loc; /* 0x580 */
123 uint32_t reserved_hw_digctl_mpte8_loc[3];
124 uint32_t hw_digctl_mpte9_loc; /* 0x590 */
125 uint32_t reserved_hw_digctl_mpte9_loc[3];
126 uint32_t hw_digctl_mpte10_loc; /* 0x5a0 */
127 uint32_t reserved_hw_digctl_mpte10_loc[3];
128 uint32_t hw_digctl_mpte11_loc; /* 0x5b0 */
129 uint32_t reserved_hw_digctl_mpte11_loc[3];
130 uint32_t hw_digctl_mpte12_loc; /* 0x5c0 */
131 uint32_t reserved_hw_digctl_mpte12_loc[3];
132 uint32_t hw_digctl_mpte13_loc; /* 0x5d0 */
133 uint32_t reserved_hw_digctl_mpte13_loc[3];
134 uint32_t hw_digctl_mpte14_loc; /* 0x5e0 */
135 uint32_t reserved_hw_digctl_mpte14_loc[3];
136 uint32_t hw_digctl_mpte15_loc; /* 0x5f0 */
137 uint32_t reserved_hw_digctl_mpte15_loc[3];