Lines Matching +full:refresh +full:- +full:power +full:- +full:source

1 /* SPDX-License-Identifier: GPL-2.0+ */
6  *   Based on arch-mx31/imx-regs.h
9  *   and arch-mx27/imx-regs.h
43 	u32 pcmr0;	/* Power Management Control 0 */
44 	u32 pcmr1;	/* Power Management Control 1 */
45 	u32 pcmr2;	/* Power Management Control 2 */
47 	u32 lpimr0;	/* Low Power Interrupt Mask 0 */
48 	u32 lpimr1;	/* Low Power Interrupt Mask 1 */
73 	u32 cmp[3]; 	/* output compare 1-3 */
74 	u32 capt[2];	/* input capture 1-2 */
125 /* Multi-Layer AHB Crossbar Switch (MAX) registers */
158 /* AHB <-> IP-Bus Interface (AIPS) */
178 	u32 lrmcr;	/* Refresh Mode Control */
227 /* Multi-Master Memory Interface */
467 #define GPT_CTRL_CLKSOURCE_32	(4 << 6)	/* Clock source	*/