Lines Matching +full:disable +full:- +full:timing +full:- +full:generator
1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2018, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
20 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
37 stdout-path = "serial0:115200n8";
47 gpio-keys {
48 compatible = "gpio-keys";
54 gpio-key,wakeup;
60 compatible = "gpio-leds";
64 linux,default-trigger = "heartbeat";
107 phy-handle = <&phy0>;
108 phy-mode = "rgmii-id";
111 ti,rx-internal-delay = <0x8>;
112 ti,tx-internal-delay = <0xa>;
113 ti,fifo-depth = <0x1>;
127 clock-frequency = <400000>;
132 gpio-controller; /* interrupt not connected */
133 #gpio-cells = <2>;
137 * 0 - MAX6643_OT_B
138 * 1 - MAX6643_FANFAIL_B
139 * 2 - MIO26_PMU_INPUT_LS
140 * 4 - SFP_SI5382_INT_ALM
141 * 5 - IIC_MUX_RESET_B
142 * 6 - GEM3_EXP_RESET_B
143 * 10 - FMCP_HSPC_PRSNT_M2C_B
144 * 11 - CLK_SPI_MUX_SEL0
145 * 12 - CLK_SPI_MUX_SEL1
146 * 16 - IRPS5401_ALERT_B
147 * 17 - INA226_PMBUS_ALERT
148 * 3, 7, 13-15 - not connected
152 i2c-mux@75 { /* u23 */
154 #address-cells = <1>;
155 #size-cells = <0>;
158 #address-cells = <1>;
159 #size-cells = <0>;
166 shunt-resistor = <2000>;
171 shunt-resistor = <5000>;
176 shunt-resistor = <5000>;
181 shunt-resistor = <5000>;
186 shunt-resistor = <5000>;
191 shunt-resistor = <2000>;
196 shunt-resistor = <5000>;
201 shunt-resistor = <5000>;
206 shunt-resistor = <5000>;
211 shunt-resistor = <5000>;
216 shunt-resistor = <5000>;
221 shunt-resistor = <5000>;
226 shunt-resistor = <5000>;
231 shunt-resistor = <5000>;
235 #address-cells = <1>;
236 #size-cells = <0>;
241 #address-cells = <1>;
242 #size-cells = <0>;
244 irps5401_43: irps54012@43 { /* IRPS5401 - u53 check these */
245 #clock-cells = <0>;
249 irps5401_44: irps54012@44 { /* IRPS5401 - u55 */
250 #clock-cells = <0>;
254 irps5401_45: irps54012@45 { /* IRPS5401 - u57 */
255 #clock-cells = <0>;
267 #address-cells = <1>;
268 #size-cells = <0>;
277 clock-frequency = <400000>;
279 i2c-mux@74 { /* u26 */
281 #address-cells = <1>;
282 #size-cells = <0>;
285 #address-cells = <1>;
286 #size-cells = <0>;
291 * 0 - 256B address 0x54
292 * 256B - 512B address 0x55
293 * 512B - 768B address 0x56
294 * 768B - 1024B address 0x57
302 #address-cells = <1>;
303 #size-cells = <0>;
305 si5341: clock-generator@36 { /* SI5341 - u46 */
312 #address-cells = <1>;
313 #size-cells = <0>;
315 si570_1: clock-generator@5d { /* USER SI570 - u47 */
316 #clock-cells = <0>;
319 temperature-stability = <50>;
320 factory-fout = <300000000>;
321 clock-frequency = <300000000>;
322 clock-output-names = "si570_user";
326 #address-cells = <1>;
327 #size-cells = <0>;
329 si570_2: clock-generator@5d { /* USER MGT SI570 - u49 */
330 #clock-cells = <0>;
333 temperature-stability = <50>;
334 factory-fout = <156250000>;
335 clock-frequency = <148500000>;
336 clock-output-names = "si570_mgt";
340 #address-cells = <1>;
341 #size-cells = <0>;
343 si5328: clock-generator@69 { /* SI5328 - u48 */
349 #address-cells = <1>;
350 #size-cells = <0>;
352 sc18is603@2f { /* sc18is602 - u93 */
358 * LMK04208 - u90 or
359 * LMX2594 - u102 or
360 * LMX2594 - u103 or
361 * LMX2594 - u104
366 #address-cells = <1>;
367 #size-cells = <0>;
374 i2c-mux@75 {
376 #address-cells = <1>;
377 #size-cells = <0>;
381 #address-cells = <1>;
382 #size-cells = <0>;
387 #address-cells = <1>;
388 #size-cells = <0>;
393 #address-cells = <1>;
394 #size-cells = <0>;
399 #address-cells = <1>;
400 #size-cells = <0>;
405 #address-cells = <1>;
406 #size-cells = <0>;
411 #address-cells = <1>;
412 #size-cells = <0>;
417 #address-cells = <1>;
418 #size-cells = <0>;
423 #address-cells = <1>;
424 #size-cells = <0>;
433 is-dual = <1>;
435 compatible = "m25p80", "spi-flash"; /* 32MB */
436 #address-cells = <1>;
437 #size-cells = <1>;
439 spi-tx-bus-width = <1>;
440 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
441 spi-max-frequency = <108000000>; /* Based on DC1 spec */
442 partition@qspi-fsbl-uboot { /* for testing purpose */
443 label = "qspi-fsbl-uboot";
446 partition@qspi-linux { /* for testing purpose */
447 label = "qspi-linux";
450 partition@qspi-device-tree { /* for testing purpose */
451 label = "qspi-device-tree";
454 partition@qspi-rootfs { /* for testing purpose */
455 label = "qspi-rootfs";
467 /* SATA OOB timing settings */
468 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
469 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
470 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
471 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
472 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
473 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
474 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
475 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
476 phy-names = "sata-phy";
483 no-1-8-v;
484 disable-wp;
505 phy-names = "usb3-phy";