arm/dts/zynqmp-zcu104-revC.dts

1 // SPDX-License-Identifier: GPL-2.0+
5  * (C) Copyright 2017 - 2018, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/phy/phy.h>
19 	compatible = "xlnx,zynqmp-zcu104-revC", "xlnx,zynqmp-zcu104", "xlnx,zynqmp";
36 		stdout-path = "serial0:115200n8";
56 	phy-handle = <&phy0>;
57 	phy-mode = "rgmii-id";
60 		ti,rx-internal-delay = <0x8>;
61 		ti,tx-internal-delay = <0xa>;
62 		ti,fifo-depth = <0x1>;
76 	clock-frequency = <400000>;
81 		gpio-controller;
82 		#gpio-cells = <2>;
86 		 * 0 - IRPS5401_ALERT_B
87 		 * 1 - HDMI_8T49N241_INT_ALM
88 		 * 2 - MAX6643_OT_B
89 		 * 3 - MAX6643_FANFAIL_B
90 		 * 5 - IIC_MUX_RESET_B
91 		 * 6 - GEM3_EXP_RESET_B
92 		 * 7 - FMC_LPC_PRSNT_M2C_B
93 		 * 4, 10 - 17 - not connected
97 	/* Another connection to this bus via PL i2c via PCA9306 - u45 */
98 	i2c-mux@74 { /* u34 */
100 		#address-cells = <1>;
101 		#size-cells = <0>;
104 			#address-cells = <1>;
105 			#size-cells = <0>;
110 			 *    0 - 256B address 0x54
111 			 * 256B - 512B address 0x55
112 			 * 512B - 768B address 0x56
113 			 * 768B - 1024B address 0x57
118 				#address-cells = <1>;
119 				#size-cells = <1>;
124 			#address-cells = <1>;
125 			#size-cells = <0>;
127 			clock_8t49n287: clock-generator@6c { /* 8T49N287 - u182 */
134 			#address-cells = <1>;
135 			#size-cells = <0>;
137 			irps5401_43: irps54012@43 { /* IRPS5401 - u175 */
138 				#clock-cells = <0>;
142 			irps5401_4d: irps54012@4d { /* IRPS5401 - u180 */
143 				#clock-cells = <0>;
150 			#address-cells = <1>;
151 			#size-cells = <0>;
156 				shunt-resistor = <5000>;
161 			#address-cells = <1>;
162 			#size-cells = <0>;
167 			#address-cells = <1>;
168 			#size-cells = <0>;
179 		compatible = "m25p80", "spi-flash"; /* n25q512a 128MiB */
180 		#address-cells = <1>;
181 		#size-cells = <1>;
183 		spi-tx-bus-width = <1>;
184 		spi-rx-bus-width = <4>;
185 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
186 		partition@qspi-fsbl-uboot { /* for testing purpose */
187 			label = "qspi-fsbl-uboot";
190 		partition@qspi-linux { /* for testing purpose */
191 			label = "qspi-linux";
194 		partition@qspi-device-tree { /* for testing purpose */
195 			label = "qspi-device-tree";
198 		partition@qspi-rootfs { /* for testing purpose */
199 			label = "qspi-rootfs";
212 	ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
213 	ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
214 	ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
215 	ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
216 	ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
217 	ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
218 	ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
219 	ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
220 	phy-names = "sata-phy";
227 	no-1-8-v;
229 	disable-wp;
253 	phy-names = "usb3-phy";
255 	maximum-speed = "super-speed";