arm/dts/zynqmp-mini-qspi.dts

1 // SPDX-License-Identifier: GPL-2.0+
5  * (C) Copyright 2015 - 2018, Xilinx, Inc.
11 /dts-v1/;
14 	model = "ZynqMP MINI QSPI";
16 	#address-cells = <2>;
17 	#size-cells = <1>;
21 		spi0 = &qspi;
25 		stdout-path = "serial0:115200n8";
36 		u-boot,dm-pre-reloc;
40 		compatible = "simple-bus";
41 		#address-cells = <2>;
42 		#size-cells = <1>;
45 		qspi: spi@ff0f0000 {  label
46 			compatible = "xlnx,zynqmp-qspi-1.0";
48 			clock-names = "ref_clk", "pclk";
50 			num-cs = <1>;
52 			#address-cells = <1>;
53 			#size-cells = <0>;
57 			compatible = "fixed-clock";
58 			#clock-cells = <0>;
59 			clock-frequency = <125000000>;
64 &qspi {
68 		#address-cells = <1>;
69 		#size-cells = <1>;
71 		spi-tx-bus-width = <1>;
72 		spi-rx-bus-width = <4>;
73 		spi-max-frequency = <10000000>;