Lines Matching +full:uniphier +full:- +full:sysctrl
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
24 next-level-cache = <&l2>;
29 compatible = "arm,cortex-a9";
31 enable-method = "psci";
32 next-level-cache = <&l2>;
37 compatible = "arm,psci-0.2";
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <25000000>;
48 arm_timer_clk: arm-timer {
49 #clock-cells = <0>;
50 compatible = "fixed-clock";
51 clock-frequency = <50000000>;
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
60 interrupt-parent = <&intc>;
62 l2: l2-cache@500c0000 {
63 compatible = "socionext,uniphier-system-cache";
67 cache-unified;
68 cache-size = <(768 * 1024)>;
69 cache-sets = <256>;
70 cache-line-size = <128>;
71 cache-level = <2>;
75 compatible = "socionext,uniphier-scssi";
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_spi0>;
86 compatible = "socionext,uniphier-uart";
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_uart0>;
97 compatible = "socionext,uniphier-uart";
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_uart1>;
108 compatible = "socionext,uniphier-uart";
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_uart2>;
119 compatible = "socionext,uniphier-uart";
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_uart3>;
130 compatible = "socionext,uniphier-gpio";
132 interrupt-parent = <&aidet>;
133 interrupt-controller;
134 #interrupt-cells = <2>;
135 gpio-controller;
136 #gpio-cells = <2>;
137 gpio-ranges = <&pinctrl 0 0 0>;
138 gpio-ranges-group-names = "gpio_range";
140 socionext,interrupt-ranges = <0 48 16>, <16 154 5>;
144 compatible = "socionext,uniphier-fi2c";
147 #address-cells = <1>;
148 #size-cells = <0>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_i2c0>;
154 clock-frequency = <100000>;
158 compatible = "socionext,uniphier-fi2c";
161 #address-cells = <1>;
162 #size-cells = <0>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_i2c1>;
168 clock-frequency = <100000>;
172 compatible = "socionext,uniphier-fi2c";
175 #address-cells = <1>;
176 #size-cells = <0>;
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_i2c2>;
182 clock-frequency = <100000>;
186 compatible = "socionext,uniphier-fi2c";
189 #address-cells = <1>;
190 #size-cells = <0>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_i2c3>;
196 clock-frequency = <100000>;
201 /* chip-internal connection for DMD */
203 compatible = "socionext,uniphier-fi2c";
205 #address-cells = <1>;
206 #size-cells = <0>;
210 clock-frequency = <400000>;
213 /* chip-internal connection for HDMI */
215 compatible = "socionext,uniphier-fi2c";
217 #address-cells = <1>;
218 #size-cells = <0>;
222 clock-frequency = <400000>;
225 system_bus: system-bus@58c00000 {
226 compatible = "socionext,uniphier-system-bus";
229 #address-cells = <2>;
230 #size-cells = <1>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&pinctrl_system_bus>;
236 compatible = "socionext,uniphier-smpctrl";
241 compatible = "socionext,uniphier-pro4-mioctrl",
242 "simple-mfd", "syscon";
246 compatible = "socionext,uniphier-pro4-mio-clock";
247 #clock-cells = <1>;
251 compatible = "socionext,uniphier-pro4-mio-reset";
252 #reset-cells = <1>;
257 compatible = "socionext,uniphier-pro4-perictrl",
258 "simple-mfd", "syscon";
262 compatible = "socionext,uniphier-pro4-peri-clock";
263 #clock-cells = <1>;
267 compatible = "socionext,uniphier-pro4-peri-reset";
268 #reset-cells = <1>;
273 compatible = "socionext,uniphier-sd-v2.91";
277 pinctrl-names = "default", "uhs";
278 pinctrl-0 = <&pinctrl_sd>;
279 pinctrl-1 = <&pinctrl_sd_uhs>;
281 reset-names = "host", "bridge";
283 bus-width = <4>;
284 cap-sd-highspeed;
285 sd-uhs-sdr12;
286 sd-uhs-sdr25;
287 sd-uhs-sdr50;
291 compatible = "socionext,uniphier-sd-v2.91";
295 pinctrl-names = "default";
296 pinctrl-0 = <&pinctrl_emmc>;
298 reset-names = "host", "bridge", "hw";
300 bus-width = <8>;
301 cap-mmc-highspeed;
302 cap-mmc-hw-reset;
303 non-removable;
307 compatible = "socionext,uniphier-sd-v2.91";
311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_sd1>;
314 reset-names = "host", "bridge";
316 bus-width = <4>;
317 cap-sd-highspeed;
321 compatible = "socionext,uniphier-ehci", "generic-ehci";
325 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_usb2>;
331 phy-names = "usb";
333 has-transaction-translator;
337 compatible = "socionext,uniphier-ehci", "generic-ehci";
341 pinctrl-names = "default";
342 pinctrl-0 = <&pinctrl_usb3>;
347 phy-names = "usb";
349 has-transaction-translator;
352 soc_glue: soc-glue@5f800000 {
353 compatible = "socionext,uniphier-pro4-soc-glue",
354 "simple-mfd", "syscon";
358 compatible = "socionext,uniphier-pro4-pinctrl";
361 usb-phy {
362 compatible = "socionext,uniphier-pro4-usb2-phy";
363 #address-cells = <1>;
364 #size-cells = <0>;
368 #phy-cells = <0>;
373 #phy-cells = <0>;
378 #phy-cells = <0>;
379 vbus-supply = <&usb0_vbus>;
384 #phy-cells = <0>;
385 vbus-supply = <&usb1_vbus>;
390 soc-glue@5f900000 {
391 compatible = "socionext,uniphier-pro4-soc-glue-debug",
392 "simple-mfd";
393 #address-cells = <1>;
394 #size-cells = <1>;
398 compatible = "socionext,uniphier-efuse";
403 compatible = "socionext,uniphier-efuse";
408 compatible = "socionext,uniphier-efuse";
414 compatible = "socionext,uniphier-pro4-aidet";
416 interrupt-controller;
417 #interrupt-cells = <2>;
421 compatible = "arm,cortex-a9-global-timer";
428 compatible = "arm,cortex-a9-twd-timer";
434 intc: interrupt-controller@60001000 {
435 compatible = "arm,cortex-a9-gic";
438 #interrupt-cells = <3>;
439 interrupt-controller;
442 sysctrl@61840000 {
443 compatible = "socionext,uniphier-pro4-sysctrl",
444 "simple-mfd", "syscon";
448 compatible = "socionext,uniphier-pro4-clock";
449 #clock-cells = <1>;
453 compatible = "socionext,uniphier-pro4-reset";
454 #reset-cells = <1>;
459 compatible = "socionext,uniphier-pro4-ave4";
463 pinctrl-names = "default";
464 pinctrl-0 = <&pinctrl_ether_rgmii>;
465 clock-names = "gio", "ether", "ether-gb", "ether-phy";
468 reset-names = "gio", "ether";
470 phy-mode = "rgmii";
471 local-mac-address = [00 00 00 00 00 00];
472 socionext,syscon-phy-mode = <&soc_glue 0>;
475 #address-cells = <1>;
476 #size-cells = <0>;
481 compatible = "socionext,uniphier-dwc3", "snps,dwc3";
484 interrupt-names = "host", "peripheral";
486 pinctrl-names = "default";
487 pinctrl-0 = <&pinctrl_usb0>;
488 clock-names = "ref", "bus_early", "suspend";
495 usb-glue@65b00000 {
496 compatible = "socionext,uniphier-pro4-dwc3-glue",
497 "simple-mfd";
498 #address-cells = <1>;
499 #size-cells = <1>;
503 compatible = "socionext,uniphier-pro4-usb3-regulator";
505 clock-names = "gio", "link";
507 reset-names = "gio", "link";
511 usb0_ssphy: ss-phy@10 {
512 compatible = "socionext,uniphier-pro4-usb3-ssphy";
514 #phy-cells = <0>;
515 clock-names = "gio", "link";
517 reset-names = "gio", "link";
519 vbus-supply = <&usb0_vbus>;
523 compatible = "socionext,uniphier-pro4-usb3-reset";
525 #reset-cells = <1>;
526 clock-names = "gio", "link";
528 reset-names = "gio", "link";
533 /* FIXME: U-Boot own node */
535 compatible = "socionext,uniphier-pro4-dwc3";
538 #address-cells = <1>;
539 #size-cells = <1>;
541 pinctrl-names = "default";
542 pinctrl-0 = <&pinctrl_usb0>;
548 tx-fifo-resize;
553 compatible = "socionext,uniphier-dwc3", "snps,dwc3";
556 interrupt-names = "host", "peripheral";
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usb1>;
560 clock-names = "ref", "bus_early", "suspend";
567 usb-glue@65d00000 {
568 compatible = "socionext,uniphier-pro4-dwc3-glue",
569 "simple-mfd";
570 #address-cells = <1>;
571 #size-cells = <1>;
575 compatible = "socionext,uniphier-pro4-usb3-regulator";
577 clock-names = "gio", "link";
579 reset-names = "gio", "link";
584 compatible = "socionext,uniphier-pro4-usb3-reset";
586 #reset-cells = <1>;
587 clock-names = "gio", "link";
589 reset-names = "gio", "link";
594 /* FIXME: U-Boot own node */
596 compatible = "socionext,uniphier-pro4-dwc3";
599 #address-cells = <1>;
600 #size-cells = <1>;
602 pinctrl-names = "default";
603 pinctrl-0 = <&pinctrl_usb1>;
609 tx-fifo-resize;
614 compatible = "socionext,uniphier-denali-nand-v5a";
616 reg-names = "nand_data", "denali_reg";
619 pinctrl-names = "default";
620 pinctrl-0 = <&pinctrl_nand>;
621 clock-names = "nand", "nand_x", "ecc";
628 #include "uniphier-pinctrl.dtsi"