Lines Matching +full:0 +full:x5f800000
17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
36 #clock-cells = <0>;
41 #clock-cells = <0>;
56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
57 <0x506c0000 0x400>;
58 interrupts = <0 174 4>, <0 175 4>;
69 reg = <0x54006000 0x100>;
70 interrupts = <0 39 4>;
72 pinctrl-0 = <&pinctrl_spi0>;
80 reg = <0x54006800 0x40>;
81 interrupts = <0 33 4>;
83 pinctrl-0 = <&pinctrl_uart0>;
84 clocks = <&peri_clk 0>;
85 resets = <&peri_rst 0>;
91 reg = <0x54006900 0x40>;
92 interrupts = <0 35 4>;
94 pinctrl-0 = <&pinctrl_uart1>;
102 reg = <0x54006a00 0x40>;
103 interrupts = <0 37 4>;
105 pinctrl-0 = <&pinctrl_uart2>;
113 reg = <0x54006b00 0x40>;
114 interrupts = <0 29 4>;
116 pinctrl-0 = <&pinctrl_uart3>;
123 reg = <0x55000000 0x200>;
129 gpio-ranges = <&pinctrl 0 0 0>;
132 socionext,interrupt-ranges = <0 48 13>, <14 62 2>;
138 reg = <0x58400000 0x40>;
140 #size-cells = <0>;
141 interrupts = <0 41 1>;
143 pinctrl-0 = <&pinctrl_i2c0>;
152 reg = <0x58480000 0x40>;
154 #size-cells = <0>;
155 interrupts = <0 42 1>;
157 pinctrl-0 = <&pinctrl_i2c1>;
166 reg = <0x58500000 0x40>;
168 #size-cells = <0>;
169 interrupts = <0 43 1>;
171 pinctrl-0 = <&pinctrl_i2c2>;
180 reg = <0x58580000 0x40>;
182 #size-cells = <0>;
183 interrupts = <0 44 1>;
185 pinctrl-0 = <&pinctrl_i2c3>;
194 reg = <0x58c00000 0x400>;
198 pinctrl-0 = <&pinctrl_system_bus>;
203 reg = <0x59801000 0x400>;
209 reg = <0x59810000 0x800>;
225 reg = <0x59820000 0x200>;
241 reg = <0x5a400000 0x200>;
242 interrupts = <0 76 4>;
244 pinctrl-0 = <&pinctrl_sd>;
246 clocks = <&mio_clk 0>;
248 resets = <&mio_rst 0>, <&mio_rst 3>;
259 reg = <0x5a500000 0x200>;
260 interrupts = <0 78 4>;
262 pinctrl-0 = <&pinctrl_emmc>;
275 reg = <0x5a800100 0x100>;
276 interrupts = <0 80 4>;
278 pinctrl-0 = <&pinctrl_usb0>;
289 reg = <0x5a810100 0x100>;
290 interrupts = <0 81 4>;
292 pinctrl-0 = <&pinctrl_usb1>;
303 reg = <0x5a820100 0x100>;
304 interrupts = <0 82 4>;
306 pinctrl-0 = <&pinctrl_usb2>;
317 reg = <0x5f800000 0x2000>;
329 ranges = <0 0x5f900000 0x2000>;
333 reg = <0x100 0x28>;
338 reg = <0x130 0x8>;
344 reg = <0x60000200 0x20>;
345 interrupts = <1 11 0x104>;
351 reg = <0x60000600 0x20>;
352 interrupts = <1 13 0x104>;
358 reg = <0x60001000 0x1000>,
359 <0x60000100 0x100>;
366 reg = <0x61830000 0x200>;
374 reg = <0x61840000 0x10000>;
391 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
392 interrupts = <0 65 4>;
394 pinctrl-0 = <&pinctrl_nand2cs>;