Lines Matching +full:hsdiscon +full:- +full:level
1 #include <dt-bindings/clock/tegra30-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra30-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&lic>;
13 pcie-controller@00003000 {
14 compatible = "nvidia,tegra30-pcie";
19 reg-names = "pads", "afi", "cs";
22 interrupt-names = "intr", "msi";
24 #interrupt-cells = <1>;
25 interrupt-map-mask = <0 0 0 0>;
26 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
28 bus-range = <0x00 0xff>;
29 #address-cells = <3>;
30 #size-cells = <2>;
36 0x82000000 0 0x20000000 0x20000000 0 0x08000000 /* non-prefetchable memory */
43 clock-names = "pex", "afi", "pll_e", "cml";
47 reset-names = "pex", "afi", "pcie_x";
52 assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>;
56 #address-cells = <3>;
57 #size-cells = <2>;
60 nvidia,num-lanes = <2>;
65 assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>;
69 #address-cells = <3>;
70 #size-cells = <2>;
73 nvidia,num-lanes = <2>;
78 assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>;
82 #address-cells = <3>;
83 #size-cells = <2>;
86 nvidia,num-lanes = <2>;
91 compatible = "nvidia,tegra30-host1x", "simple-bus";
97 reset-names = "host1x";
99 #address-cells = <1>;
100 #size-cells = <1>;
105 compatible = "nvidia,tegra30-mpe";
110 reset-names = "mpe";
114 compatible = "nvidia,tegra30-vi";
119 reset-names = "vi";
123 compatible = "nvidia,tegra30-epp";
128 reset-names = "epp";
132 compatible = "nvidia,tegra30-isp";
137 reset-names = "isp";
141 compatible = "nvidia,tegra30-gr2d";
146 reset-names = "2d";
150 compatible = "nvidia,tegra30-gr3d";
154 clock-names = "3d", "3d2";
157 reset-names = "3d", "3d2";
161 compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc";
166 clock-names = "dc", "parent";
168 reset-names = "dc";
180 compatible = "nvidia,tegra30-dc";
185 clock-names = "dc", "parent";
187 reset-names = "dc";
199 compatible = "nvidia,tegra30-hdmi";
204 clock-names = "hdmi", "parent";
206 reset-names = "hdmi";
211 compatible = "nvidia,tegra30-tvo";
219 compatible = "nvidia,tegra30-dsi";
223 reset-names = "dsi";
229 compatible = "arm,cortex-a9-twd-timer";
231 interrupt-parent = <&intc>;
237 intc: interrupt-controller@50041000 {
238 compatible = "arm,cortex-a9-gic";
241 interrupt-controller;
242 #interrupt-cells = <3>;
243 interrupt-parent = <&intc>;
246 cache-controller@50043000 {
247 compatible = "arm,pl310-cache";
249 arm,data-latency = <6 6 2>;
250 arm,tag-latency = <5 5 2>;
251 cache-unified;
252 cache-level = <2>;
255 lic: interrupt-controller@60004000 {
256 compatible = "nvidia,tegra30-ictlr";
262 interrupt-controller;
263 #interrupt-cells = <3>;
264 interrupt-parent = <&intc>;
268 compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
280 compatible = "nvidia,tegra30-car";
282 #clock-cells = <1>;
283 #reset-cells = <1>;
286 flow-controller@60007000 {
287 compatible = "nvidia,tegra30-flowctrl";
292 compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
328 reset-names = "dma";
329 #dma-cells = <1>;
333 compatible = "nvidia,tegra30-ahb";
338 compatible = "nvidia,tegra30-gpio";
348 #gpio-cells = <2>;
349 gpio-controller;
350 #interrupt-cells = <2>;
351 interrupt-controller;
353 gpio-ranges = <&pinmux 0 0 248>;
358 compatible = "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc";
364 compatible = "nvidia,tegra30-pinmux";
373 * is "nvidia,tegra30-uart", "nvidia,tegra20-uart" and to enable
375 * "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart".
378 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
380 reg-shift = <2>;
384 reset-names = "serial";
386 dma-names = "rx", "tx";
391 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
393 reg-shift = <2>;
397 reset-names = "serial";
399 dma-names = "rx", "tx";
404 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
406 reg-shift = <2>;
410 reset-names = "serial";
412 dma-names = "rx", "tx";
417 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
419 reg-shift = <2>;
423 reset-names = "serial";
425 dma-names = "rx", "tx";
430 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
432 reg-shift = <2>;
436 reset-names = "serial";
438 dma-names = "rx", "tx";
443 compatible = "nvidia,tegra30-pwm", "nvidia,tegra20-pwm";
445 #pwm-cells = <2>;
448 reset-names = "pwm";
453 compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc";
460 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
463 #address-cells = <1>;
464 #size-cells = <0>;
467 clock-names = "div-clk", "fast-clk";
469 reset-names = "i2c";
471 dma-names = "rx", "tx";
476 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
479 #address-cells = <1>;
480 #size-cells = <0>;
483 clock-names = "div-clk", "fast-clk";
485 reset-names = "i2c";
487 dma-names = "rx", "tx";
492 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
495 #address-cells = <1>;
496 #size-cells = <0>;
499 clock-names = "div-clk", "fast-clk";
501 reset-names = "i2c";
503 dma-names = "rx", "tx";
508 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
511 #address-cells = <1>;
512 #size-cells = <0>;
516 reset-names = "i2c";
517 clock-names = "div-clk", "fast-clk";
519 dma-names = "rx", "tx";
524 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
527 #address-cells = <1>;
528 #size-cells = <0>;
531 clock-names = "div-clk", "fast-clk";
533 reset-names = "i2c";
535 dma-names = "rx", "tx";
540 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
543 #address-cells = <1>;
544 #size-cells = <0>;
547 reset-names = "spi";
549 dma-names = "rx", "tx";
554 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
557 #address-cells = <1>;
558 #size-cells = <0>;
561 reset-names = "spi";
563 dma-names = "rx", "tx";
568 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
571 #address-cells = <1>;
572 #size-cells = <0>;
575 reset-names = "spi";
577 dma-names = "rx", "tx";
582 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
585 #address-cells = <1>;
586 #size-cells = <0>;
589 reset-names = "spi";
591 dma-names = "rx", "tx";
596 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
599 #address-cells = <1>;
600 #size-cells = <0>;
603 reset-names = "spi";
605 dma-names = "rx", "tx";
610 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
613 #address-cells = <1>;
614 #size-cells = <0>;
617 reset-names = "spi";
619 dma-names = "rx", "tx";
624 compatible = "nvidia,tegra30-kbc", "nvidia,tegra20-kbc";
629 reset-names = "kbc";
634 compatible = "nvidia,tegra30-pmc";
637 clock-names = "pclk", "clk32k_in";
640 mc: memory-controller@7000f000 {
641 compatible = "nvidia,tegra30-mc";
644 clock-names = "mc";
648 #iommu-cells = <1>;
652 compatible = "nvidia,tegra30-efuse";
655 clock-names = "fuse";
657 reset-names = "fuse";
661 compatible = "nvidia,tegra30-hda";
667 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
671 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
676 compatible = "nvidia,tegra30-ahub";
682 clock-names = "d_audio", "apbif";
694 reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
701 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
704 #address-cells = <1>;
705 #size-cells = <1>;
708 compatible = "nvidia,tegra30-i2s";
710 nvidia,ahub-cif-ids = <4 4>;
713 reset-names = "i2s";
718 compatible = "nvidia,tegra30-i2s";
720 nvidia,ahub-cif-ids = <5 5>;
723 reset-names = "i2s";
728 compatible = "nvidia,tegra30-i2s";
730 nvidia,ahub-cif-ids = <6 6>;
733 reset-names = "i2s";
738 compatible = "nvidia,tegra30-i2s";
740 nvidia,ahub-cif-ids = <7 7>;
743 reset-names = "i2s";
748 compatible = "nvidia,tegra30-i2s";
750 nvidia,ahub-cif-ids = <8 8>;
753 reset-names = "i2s";
759 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
764 reset-names = "sdhci";
769 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
774 reset-names = "sdhci";
779 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
784 reset-names = "sdhci";
789 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
794 reset-names = "sdhci";
799 compatible = "nvidia,tegra30-ehci", "usb-ehci";
805 reset-names = "usb";
806 nvidia,needs-double-reset;
811 phy1: usb-phy@7d000000 {
812 compatible = "nvidia,tegra30-usb-phy";
818 clock-names = "reg", "pll_u", "utmi-pads";
820 reset-names = "usb", "utmi-pads";
821 nvidia,hssync-start-delay = <9>;
822 nvidia,idle-wait-delay = <17>;
823 nvidia,elastic-limit = <16>;
824 nvidia,term-range-adj = <6>;
825 nvidia,xcvr-setup = <51>;
826 nvidia.xcvr-setup-use-fuses;
827 nvidia,xcvr-lsfslew = <1>;
828 nvidia,xcvr-lsrslew = <1>;
829 nvidia,xcvr-hsslew = <32>;
830 nvidia,hssquelch-level = <2>;
831 nvidia,hsdiscon-level = <5>;
832 nvidia,has-utmi-pad-registers;
837 compatible = "nvidia,tegra30-ehci", "usb-ehci";
843 reset-names = "usb";
848 phy2: usb-phy@7d004000 {
849 compatible = "nvidia,tegra30-usb-phy";
855 clock-names = "reg", "pll_u", "utmi-pads";
857 reset-names = "usb", "utmi-pads";
858 nvidia,hssync-start-delay = <9>;
859 nvidia,idle-wait-delay = <17>;
860 nvidia,elastic-limit = <16>;
861 nvidia,term-range-adj = <6>;
862 nvidia,xcvr-setup = <51>;
863 nvidia.xcvr-setup-use-fuses;
864 nvidia,xcvr-lsfslew = <2>;
865 nvidia,xcvr-lsrslew = <2>;
866 nvidia,xcvr-hsslew = <32>;
867 nvidia,hssquelch-level = <2>;
868 nvidia,hsdiscon-level = <5>;
873 compatible = "nvidia,tegra30-ehci", "usb-ehci";
879 reset-names = "usb";
884 phy3: usb-phy@7d008000 {
885 compatible = "nvidia,tegra30-usb-phy";
891 clock-names = "reg", "pll_u", "utmi-pads";
893 reset-names = "usb", "utmi-pads";
894 nvidia,hssync-start-delay = <0>;
895 nvidia,idle-wait-delay = <17>;
896 nvidia,elastic-limit = <16>;
897 nvidia,term-range-adj = <6>;
898 nvidia,xcvr-setup = <51>;
899 nvidia.xcvr-setup-use-fuses;
900 nvidia,xcvr-lsfslew = <2>;
901 nvidia,xcvr-lsrslew = <2>;
902 nvidia,xcvr-hsslew = <32>;
903 nvidia,hssquelch-level = <2>;
904 nvidia,hsdiscon-level = <5>;
909 #address-cells = <1>;
910 #size-cells = <0>;
914 compatible = "arm,cortex-a9";
920 compatible = "arm,cortex-a9";
926 compatible = "arm,cortex-a9";
932 compatible = "arm,cortex-a9";
938 compatible = "arm,cortex-a9-pmu";