Lines Matching +full:tegra124 +full:- +full:usb +full:- +full:phy

1 #include <dt-bindings/clock/tegra210-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra210-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
10 interrupt-parent = <&lic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 pcie-controller@01003000 {
15 compatible = "nvidia,tegra210-pcie";
20 reg-names = "pads", "afi", "cs";
23 interrupt-names = "intr", "msi";
25 #interrupt-cells = <1>;
26 interrupt-map-mask = <0 0 0 0>;
27 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
29 bus-range = <0x00 0xff>;
30 #address-cells = <3>;
31 #size-cells = <2>;
36 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
43 clock-names = "pex", "afi", "pll_e", "cml";
47 reset-names = "pex", "afi", "pcie_x";
51 phy-names = "pcie";
55 assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
59 #address-cells = <3>;
60 #size-cells = <2>;
63 nvidia,num-lanes = <4>;
68 assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
72 #address-cells = <3>;
73 #size-cells = <2>;
76 nvidia,num-lanes = <1>;
81 compatible = "nvidia,tegra210-host1x", "simple-bus";
86 clock-names = "host1x";
88 reset-names = "host1x";
90 #address-cells = <2>;
91 #size-cells = <2>;
96 compatible = "nvidia,tegra210-dpaux";
101 clock-names = "dpaux", "parent";
103 reset-names = "dpaux";
108 compatible = "nvidia,tegra210-vi";
115 compatible = "nvidia,tegra210-tsec";
120 compatible = "nvidia,tegra210-dc";
125 clock-names = "dc", "parent";
127 reset-names = "dc";
135 compatible = "nvidia,tegra210-dc";
140 clock-names = "dc", "parent";
142 reset-names = "dc";
150 compatible = "nvidia,tegra210-dsi";
155 clock-names = "dsi", "lp", "parent";
157 reset-names = "dsi";
158 nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */
162 #address-cells = <1>;
163 #size-cells = <0>;
167 compatible = "nvidia,tegra210-vic";
173 compatible = "nvidia,tegra210-nvjpg";
179 compatible = "nvidia,tegra210-dsi";
184 clock-names = "dsi", "lp", "parent";
186 reset-names = "dsi";
187 nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */
191 #address-cells = <1>;
192 #size-cells = <0>;
196 compatible = "nvidia,tegra210-nvdec";
202 compatible = "nvidia,tegra210-nvenc";
208 compatible = "nvidia,tegra210-tsec";
214 compatible = "nvidia,tegra210-sor";
221 clock-names = "sor", "parent", "dp", "safe";
223 reset-names = "sor";
228 compatible = "nvidia,tegra210-sor1";
235 clock-names = "sor", "parent", "dp", "safe";
237 reset-names = "sor";
242 compatible = "nvidia,tegra124-dpaux";
247 clock-names = "dpaux", "parent";
249 reset-names = "dpaux";
254 compatible = "nvidia,tegra210-isp";
261 compatible = "nvidia,tegra210-isp";
268 compatible = "nvidia,tegra210-i2c-vi";
275 gic: interrupt-controller@50041000 {
276 compatible = "arm,gic-400";
277 #interrupt-cells = <3>;
278 interrupt-controller;
285 interrupt-parent = <&gic>;
294 interrupt-names = "stall", "nonstall";
298 clock-names = "gpu", "pwr", "ref";
300 reset-names = "gpu";
307 lic: interrupt-controller@60004000 {
308 compatible = "nvidia,tegra210-ictlr";
315 interrupt-controller;
316 #interrupt-cells = <3>;
317 interrupt-parent = <&gic>;
321 compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer";
330 clock-names = "timer";
334 compatible = "nvidia,tegra210-car";
336 #clock-cells = <1>;
337 #reset-cells = <1>;
340 flow-controller@60007000 {
341 compatible = "nvidia,tegra210-flowctrl";
346 compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio";
356 #gpio-cells = <2>;
357 gpio-controller;
358 #interrupt-cells = <2>;
359 interrupt-controller;
363 compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma";
398 clock-names = "dma";
400 reset-names = "dma";
401 #dma-cells = <1>;
405 compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc";
411 compatible = "nvidia,tegra210-pinmux";
420 * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
422 * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
425 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
427 reg-shift = <2>;
430 clock-names = "serial";
432 reset-names = "serial";
434 dma-names = "rx", "tx";
439 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
441 reg-shift = <2>;
444 clock-names = "serial";
446 reset-names = "serial";
448 dma-names = "rx", "tx";
453 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
455 reg-shift = <2>;
458 clock-names = "serial";
460 reset-names = "serial";
462 dma-names = "rx", "tx";
467 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
469 reg-shift = <2>;
472 clock-names = "serial";
474 reset-names = "serial";
476 dma-names = "rx", "tx";
481 compatible = "nvidia,tegra210-pwm", "nvidia,tegra20-pwm";
483 #pwm-cells = <2>;
485 clock-names = "pwm";
487 reset-names = "pwm";
492 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
495 #address-cells = <1>;
496 #size-cells = <0>;
498 clock-names = "div-clk";
500 reset-names = "i2c";
502 dma-names = "rx", "tx";
507 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
510 #address-cells = <1>;
511 #size-cells = <0>;
513 clock-names = "div-clk";
515 reset-names = "i2c";
517 dma-names = "rx", "tx";
522 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
525 #address-cells = <1>;
526 #size-cells = <0>;
528 clock-names = "div-clk";
530 reset-names = "i2c";
532 dma-names = "rx", "tx";
537 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
540 #address-cells = <1>;
541 #size-cells = <0>;
543 clock-names = "div-clk";
545 reset-names = "i2c";
547 dma-names = "rx", "tx";
552 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
555 #address-cells = <1>;
556 #size-cells = <0>;
558 clock-names = "div-clk";
560 reset-names = "i2c";
562 dma-names = "rx", "tx";
567 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
570 #address-cells = <1>;
571 #size-cells = <0>;
573 clock-names = "div-clk";
575 reset-names = "i2c";
577 dma-names = "rx", "tx";
582 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
585 #address-cells = <1>;
586 #size-cells = <0>;
588 clock-names = "spi";
590 reset-names = "spi";
592 dma-names = "rx", "tx";
597 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
600 #address-cells = <1>;
601 #size-cells = <0>;
603 clock-names = "spi";
605 reset-names = "spi";
607 dma-names = "rx", "tx";
612 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
615 #address-cells = <1>;
616 #size-cells = <0>;
618 clock-names = "spi";
620 reset-names = "spi";
622 dma-names = "rx", "tx";
627 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
630 #address-cells = <1>;
631 #size-cells = <0>;
633 clock-names = "spi";
635 reset-names = "spi";
637 dma-names = "rx", "tx";
642 compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc";
646 clock-names = "rtc";
650 compatible = "nvidia,tegra210-pmc";
653 clock-names = "pclk", "clk32k_in";
657 compatible = "nvidia,tegra210-efuse";
660 clock-names = "fuse";
662 reset-names = "fuse";
665 mc: memory-controller@70019000 {
666 compatible = "nvidia,tegra210-mc";
669 clock-names = "mc";
673 #iommu-cells = <1>;
677 compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda";
683 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
687 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
692 compatible = "nvidia,tegra210-xusb-padctl";
695 reset-names = "padctl";
696 #phy-cells = <1>;
700 compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
704 clock-names = "sdhci";
706 reset-names = "sdhci";
711 compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
715 clock-names = "sdhci";
717 reset-names = "sdhci";
722 compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
726 clock-names = "sdhci";
728 reset-names = "sdhci";
733 compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
737 clock-names = "sdhci";
739 reset-names = "sdhci";
744 compatible = "nvidia,tegra210-mipi";
747 clock-names = "mipi-cal";
748 #nvidia,mipi-calibrate-cells = <1>;
752 compatible = "nvidia,tegra210-qspi";
755 #address-cells = <1>;
756 #size-cells = <0>;
758 clock-names = "qspi";
760 reset-names = "qspi";
762 dma-names = "rx", "tx";
766 usb@7d000000 {
767 compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci";
772 clock-names = "usb";
774 reset-names = "usb";
775 nvidia,phy = <&phy1>;
779 phy1: usb-phy@7d000000 {
780 compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy";
787 clock-names = "reg", "pll_u", "utmi-pads";
789 reset-names = "usb", "utmi-pads";
790 nvidia,hssync-start-delay = <0>;
791 nvidia,idle-wait-delay = <17>;
792 nvidia,elastic-limit = <16>;
793 nvidia,term-range-adj = <6>;
794 nvidia,xcvr-setup = <9>;
795 nvidia,xcvr-lsfslew = <0>;
796 nvidia,xcvr-lsrslew = <3>;
797 nvidia,hssquelch-level = <2>;
798 nvidia,hsdiscon-level = <5>;
799 nvidia,xcvr-hsslew = <12>;
800 nvidia,has-utmi-pad-registers;
804 usb@7d004000 {
805 compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci";
810 clock-names = "usb";
812 reset-names = "usb";
813 nvidia,phy = <&phy2>;
817 phy2: usb-phy@7d004000 {
818 compatible = "nvidia,tegra210-usb-phy", "nvidia,tegra30-usb-phy";
825 clock-names = "reg", "pll_u", "utmi-pads";
827 reset-names = "usb", "utmi-pads";
828 nvidia,hssync-start-delay = <0>;
829 nvidia,idle-wait-delay = <17>;
830 nvidia,elastic-limit = <16>;
831 nvidia,term-range-adj = <6>;
832 nvidia,xcvr-setup = <9>;
833 nvidia,xcvr-lsfslew = <0>;
834 nvidia,xcvr-lsrslew = <3>;
835 nvidia,hssquelch-level = <2>;
836 nvidia,hsdiscon-level = <5>;
837 nvidia,xcvr-hsslew = <12>;
842 #address-cells = <1>;
843 #size-cells = <0>;
847 compatible = "arm,cortex-a57";
853 compatible = "arm,cortex-a57";
859 compatible = "arm,cortex-a57";
865 compatible = "arm,cortex-a57";
871 compatible = "arm,armv8-timer";
880 interrupt-parent = <&gic>;