arm/dts/tegra124.dtsi

1 #include <dt-bindings/clock/tegra124-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra124-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
13 	compatible = "nvidia,tegra124";
14 	interrupt-parent = <&lic>;
17 	pcie-controller@01003000 {
18 		compatible = "nvidia,tegra124-pcie";
23 		reg-names = "pads", "afi", "cs";
26 		interrupt-names = "intr", "msi";
28 		#interrupt-cells = <1>;
29 		interrupt-map-mask = <0 0 0 0>;
30 		interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
32 		bus-range = <0x00 0xff>;
33 		#address-cells = <3>;
34 		#size-cells = <2>;
39 			  0x82000000 0 0x13000000 0x13000000 0 0x0d000000   /* non-prefetchable memory (208 MiB) */
46 		clock-names = "pex", "afi", "pll_e", "cml";
50 		reset-names = "pex", "afi", "pcie_x";
54 		phy-names = "pcie";
58 			assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
62 			#address-cells = <3>;
63 			#size-cells = <2>;
66 			nvidia,num-lanes = <2>;
71 			assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
75 			#address-cells = <3>;
76 			#size-cells = <2>;
79 			nvidia,num-lanes = <1>;
84 		compatible = "nvidia,tegra124-host1x", "simple-bus";
90 		reset-names = "host1x";
92 		#address-cells = <1>;
93 		#size-cells = <1>;
98 			compatible = "nvidia,tegra124-dc";
103 			clock-names = "dc", "parent";
105 			reset-names = "dc";
113 			compatible = "nvidia,tegra124-dc";
118 			clock-names = "dc", "parent";
120 			reset-names = "dc";
128 			compatible = "nvidia,tegra124-hdmi";
133 			clock-names = "hdmi", "parent";
135 			reset-names = "hdmi";
140 			compatible = "nvidia,tegra124-sor";
147 			clock-names = "sor", "parent", "dp", "safe";
149 			reset-names = "sor";
154 			compatible = "nvidia,tegra124-dpaux";
159 			clock-names = "dpaux", "parent";
161 			reset-names = "dpaux";
166 	gic: interrupt-controller@50041000 {
167 		compatible = "arm,cortex-a15-gic";
168 		#interrupt-cells = <3>;
169 		interrupt-controller;
176 		interrupt-parent = <&gic>;
185 		interrupt-names = "stall", "nonstall";
188 		clock-names = "gpu", "pwr";
190 		reset-names = "gpu";
197 	lic: interrupt-controller@60004000 {
198 		compatible = "nvidia,tegra124-ictlr", "nvidia,tegra30-ictlr";
204 		interrupt-controller;
205 		#interrupt-cells = <3>;
206 		interrupt-parent = <&gic>;
210 		compatible = "nvidia,tegra124-timer", "nvidia,tegra30-timer", "nvidia,tegra20-timer";
222 		compatible = "nvidia,tegra124-car";
224 		#clock-cells = <1>;
225 		#reset-cells = <1>;
226 		nvidia,external-memory-controller = <&emc>;
229 	flow-controller@60007000 {
230 		compatible = "nvidia,tegra124-flowctrl";
235 		compatible = "nvidia,tegra124-actmon";
240 		clock-names = "actmon", "emc";
242 		reset-names = "actmon";
246 		compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
256 		#gpio-cells = <2>;
257 		gpio-controller;
258 		#interrupt-cells = <2>;
259 		interrupt-controller;
261 		gpio-ranges = <&pinmux 0 0 251>;
266 		compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
302 		reset-names = "dma";
303 		#dma-cells = <1>;
307 		compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
313 		compatible = "nvidia,tegra124-pinmux";
323 	 * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
325 	 * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
328 		compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
330 		reg-shift = <2>;
334 		reset-names = "serial";
336 		dma-names = "rx", "tx";
341 		compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
343 		reg-shift = <2>;
347 		reset-names = "serial";
349 		dma-names = "rx", "tx";
354 		compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
356 		reg-shift = <2>;
360 		reset-names = "serial";
362 		dma-names = "rx", "tx";
367 		compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
369 		reg-shift = <2>;
373 		reset-names = "serial";
375 		dma-names = "rx", "tx";
380 		compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
382 		#pwm-cells = <2>;
385 		reset-names = "pwm";
390 		compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
393 		#address-cells = <1>;
394 		#size-cells = <0>;
396 		clock-names = "div-clk";
398 		reset-names = "i2c";
400 		dma-names = "rx", "tx";
405 		compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
408 		#address-cells = <1>;
409 		#size-cells = <0>;
411 		clock-names = "div-clk";
413 		reset-names = "i2c";
415 		dma-names = "rx", "tx";
420 		compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
423 		#address-cells = <1>;
424 		#size-cells = <0>;
426 		clock-names = "div-clk";
428 		reset-names = "i2c";
430 		dma-names = "rx", "tx";
435 		compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
438 		#address-cells = <1>;
439 		#size-cells = <0>;
441 		clock-names = "div-clk";
443 		reset-names = "i2c";
445 		dma-names = "rx", "tx";
450 		compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
453 		#address-cells = <1>;
454 		#size-cells = <0>;
456 		clock-names = "div-clk";
458 		reset-names = "i2c";
460 		dma-names = "rx", "tx";
465 		compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
468 		#address-cells = <1>;
469 		#size-cells = <0>;
471 		clock-names = "div-clk";
473 		reset-names = "i2c";
475 		dma-names = "rx", "tx";
480 		compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
483 		#address-cells = <1>;
484 		#size-cells = <0>;
486 		clock-names = "spi";
488 		reset-names = "spi";
490 		dma-names = "rx", "tx";
495 		compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
498 		#address-cells = <1>;
499 		#size-cells = <0>;
501 		clock-names = "spi";
503 		reset-names = "spi";
505 		dma-names = "rx", "tx";
510 		compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
513 		#address-cells = <1>;
514 		#size-cells = <0>;
516 		clock-names = "spi";
518 		reset-names = "spi";
520 		dma-names = "rx", "tx";
525 		compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
528 		#address-cells = <1>;
529 		#size-cells = <0>;
531 		clock-names = "spi";
533 		reset-names = "spi";
535 		dma-names = "rx", "tx";
540 		compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
543 		#address-cells = <1>;
544 		#size-cells = <0>;
546 		clock-names = "spi";
548 		reset-names = "spi";
550 		dma-names = "rx", "tx";
555 		compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
558 		#address-cells = <1>;
559 		#size-cells = <0>;
561 		clock-names = "spi";
563 		reset-names = "spi";
565 		dma-names = "rx", "tx";
570 		compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
577 		compatible = "nvidia,tegra124-pmc";
580 		clock-names = "pclk", "clk32k_in";
584 		compatible = "nvidia,tegra124-efuse";
587 		clock-names = "fuse";
589 		reset-names = "fuse";
592 	mc: memory-controller@70019000 {
593 		compatible = "nvidia,tegra124-mc";
596 		clock-names = "mc";
600 		#iommu-cells = <1>;
604 		compatible = "nvidia,tegra124-emc";
607 		nvidia,memory-controller = <&mc>;
611 		compatible = "nvidia,tegra124-ahci";
619 		clock-names = "sata", "sata-oob", "cml1", "pll_e";
623 		reset-names = "sata", "sata-oob", "sata-cold";
625 		phy-names = "sata-phy";
630 		compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
636 		clock-names = "hda", "hda2hdmi", "hda2codec_2x";
640 		reset-names = "hda", "hda2hdmi", "hda2codec_2x";
645 		compatible = "nvidia,tegra124-xusb";
649 		reg-names = "hcd", "fpci", "ipfs";
665 		clock-names = "xusb_host", "xusb_host_src",
672 		reset-names = "xusb_host", "xusb_ss", "xusb_src";
674 		nvidia,xusb-padctl = <&padctl>;
680 		compatible = "nvidia,tegra124-xusb-padctl";
683 		reset-names = "padctl";
685 		#phy-cells = <1>;
689 		compatible = "nvidia,tegra124-sdhci";
694 		reset-names = "sdhci";
699 		compatible = "nvidia,tegra124-sdhci";
704 		reset-names = "sdhci";
709 		compatible = "nvidia,tegra124-sdhci";
714 		reset-names = "sdhci";
719 		compatible = "nvidia,tegra124-sdhci";
724 		reset-names = "sdhci";
728 	soctherm: thermal-sensor@700e2000 {
729 		compatible = "nvidia,tegra124-soctherm";
734 		clock-names = "tsensor", "soctherm";
736 		reset-names = "soctherm";
737 		#thermal-sensor-cells = <1>;
741 		compatible = "nvidia,tegra124-dfll";
745 		      <0x70110200 0x100>; /* Look-up table RAM */
750 		clock-names = "soc", "ref", "i2c";
752 		reset-names = "dvco";
753 		#clock-cells = <0>;
754 		clock-output-names = "dfllCPU_out";
755 		nvidia,sample-rate = <12500>;
756 		nvidia,droop-ctrl = <0x00000f00>;
757 		nvidia,force-mode = <1>;
765 		compatible = "nvidia,tegra124-ahub";
772 		clock-names = "d_audio", "apbif";
794 		reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
808 		dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
813 		#address-cells = <1>;
814 		#size-cells = <1>;
817 			compatible = "nvidia,tegra124-i2s";
819 			nvidia,ahub-cif-ids = <4 4>;
822 			reset-names = "i2s";
827 			compatible = "nvidia,tegra124-i2s";
829 			nvidia,ahub-cif-ids = <5 5>;
832 			reset-names = "i2s";
837 			compatible = "nvidia,tegra124-i2s";
839 			nvidia,ahub-cif-ids = <6 6>;
842 			reset-names = "i2s";
847 			compatible = "nvidia,tegra124-i2s";
849 			nvidia,ahub-cif-ids = <7 7>;
852 			reset-names = "i2s";
857 			compatible = "nvidia,tegra124-i2s";
859 			nvidia,ahub-cif-ids = <8 8>;
862 			reset-names = "i2s";
868 		compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
874 		reset-names = "usb";
879 	phy1: usb-phy@7d000000 {
880 		compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
887 		clock-names = "reg", "pll_u", "utmi-pads";
889 		reset-names = "usb", "utmi-pads";
890 		nvidia,hssync-start-delay = <0>;
891 		nvidia,idle-wait-delay = <17>;
892 		nvidia,elastic-limit = <16>;
893 		nvidia,term-range-adj = <6>;
894 		nvidia,xcvr-setup = <9>;
895 		nvidia,xcvr-lsfslew = <0>;
896 		nvidia,xcvr-lsrslew = <3>;
897 		nvidia,hssquelch-level = <2>;
898 		nvidia,hsdiscon-level = <5>;
899 		nvidia,xcvr-hsslew = <12>;
900 		nvidia,has-utmi-pad-registers;
905 		compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
911 		reset-names = "usb";
916 	phy2: usb-phy@7d004000 {
917 		compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
924 		clock-names = "reg", "pll_u", "utmi-pads";
926 		reset-names = "usb", "utmi-pads";
927 		nvidia,hssync-start-delay = <0>;
928 		nvidia,idle-wait-delay = <17>;
929 		nvidia,elastic-limit = <16>;
930 		nvidia,term-range-adj = <6>;
931 		nvidia,xcvr-setup = <9>;
932 		nvidia,xcvr-lsfslew = <0>;
933 		nvidia,xcvr-lsrslew = <3>;
934 		nvidia,hssquelch-level = <2>;
935 		nvidia,hsdiscon-level = <5>;
936 		nvidia,xcvr-hsslew = <12>;
941 		compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
947 		reset-names = "usb";
952 	phy3: usb-phy@7d008000 {
953 		compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
960 		clock-names = "reg", "pll_u", "utmi-pads";
962 		reset-names = "usb", "utmi-pads";
963 		nvidia,hssync-start-delay = <0>;
964 		nvidia,idle-wait-delay = <17>;
965 		nvidia,elastic-limit = <16>;
966 		nvidia,term-range-adj = <6>;
967 		nvidia,xcvr-setup = <9>;
968 		nvidia,xcvr-lsfslew = <0>;
969 		nvidia,xcvr-lsrslew = <3>;
970 		nvidia,hssquelch-level = <2>;
971 		nvidia,hsdiscon-level = <5>;
972 		nvidia,xcvr-hsslew = <12>;
977 		#address-cells = <1>;
978 		#size-cells = <0>;
982 			compatible = "arm,cortex-a15";
990 			clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";
992 			clock-latency = <300000>;
997 			compatible = "arm,cortex-a15";
1003 			compatible = "arm,cortex-a15";
1009 			compatible = "arm,cortex-a15";
1015 		compatible = "arm,cortex-a15-pmu";
1020 		interrupt-affinity = <&{/cpus/cpu@0}>,
1026 	thermal-zones {
1028 			polling-delay-passive = <1000>;
1029 			polling-delay = <1000>;
1031 			thermal-sensors =
1036 			polling-delay-passive = <1000>;
1037 			polling-delay = <1000>;
1039 			thermal-sensors =
1044 			polling-delay-passive = <1000>;
1045 			polling-delay = <1000>;
1047 			thermal-sensors =
1052 			polling-delay-passive = <1000>;
1053 			polling-delay = <1000>;
1055 			thermal-sensors =
1061 		compatible = "arm,armv7-timer";
1070 		interrupt-parent = <&gic>;