Lines Matching +full:0 +full:x01c13400
59 #clock-cells = <0>;
66 #clock-cells = <0>;
75 #size-cells = <0>;
77 cpu@0 {
80 reg = <0>;
112 reg = <0x01c00030 0x0c>;
113 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
119 reg = <0x01c0f000 0x1000>;
124 pinctrl-0 = <&mmc0_pins>;
129 #size-cells = <0>;
135 reg = <0x01c10000 0x1000>;
143 #size-cells = <0>;
149 reg = <0x01c11000 0x1000>;
154 pinctrl-0 = <&mmc2_pins>;
159 #size-cells = <0>;
165 reg = <0x01c12000 0x1000>;
173 #size-cells = <0>;
178 reg = <0x01c13400 0x14>,
179 <0x01c14800 0x4>,
180 <0x01c19800 0x4>,
181 <0x01c1c800 0x4>;
204 reg = <0x01c19000 0x100>;
215 reg = <0x01c19400 0x100>;
227 reg = <0x01c1c000 0x100>;
238 reg = <0x01c1c400 0x100>;
250 reg = <0x01c20000 0x400>;
259 reg = <0x01c20800 0x400>;
319 reg = <0x01c20c90 0x10>;
324 reg = <0x01c28000 0x400>;
335 reg = <0x01c28400 0x400>;
346 reg = <0x01c28800 0x400>;
357 reg = <0x01c28c00 0x400>;
368 reg = <0x01c29000 0x400>;
379 reg = <0x01c29400 0x400>;
390 reg = <0x01c29800 0x400>;
401 reg = <0x01c29c00 0x400>;
412 reg = <0x01c2ac00 0x400>;
416 pinctrl-0 = <&i2c0_pins>;
420 #size-cells = <0>;
425 reg = <0x01c2b000 0x400>;
431 #size-cells = <0>;
436 reg = <0x01c2b400 0x400>;
442 #size-cells = <0>;
447 reg = <0x01c2b800 0x400>;
453 #size-cells = <0>;
458 reg = <0x01c2c000 0x400>;
464 #size-cells = <0>;
470 reg = <0x01c50000 0x10000>;
478 #size-cells = <0>;
484 #size-cells = <0>;
490 reg = <0x01c81000 0x1000>,
491 <0x01c82000 0x1000>,
492 <0x01c84000 0x2000>,
493 <0x01c86000 0x2000>;