Lines Matching +full:tcon0 +full:- +full:pixel +full:- +full:clock
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
55 interrupt-parent = <&gic>;
56 #address-cells = <1>;
57 #size-cells = <1>;
60 #address-cells = <1>;
61 #size-cells = <0>;
65 clock-names = "cpu";
66 compatible = "arm,cortex-a7";
68 operating-points-v2 = <&cpu0_opp_table>;
69 cci-control-port = <&cci_control0>;
70 enable-method = "allwinner,sun8i-a83t-smp";
75 compatible = "arm,cortex-a7";
77 operating-points-v2 = <&cpu0_opp_table>;
78 cci-control-port = <&cci_control0>;
79 enable-method = "allwinner,sun8i-a83t-smp";
84 compatible = "arm,cortex-a7";
86 operating-points-v2 = <&cpu0_opp_table>;
87 cci-control-port = <&cci_control0>;
88 enable-method = "allwinner,sun8i-a83t-smp";
93 compatible = "arm,cortex-a7";
95 operating-points-v2 = <&cpu0_opp_table>;
96 cci-control-port = <&cci_control0>;
97 enable-method = "allwinner,sun8i-a83t-smp";
103 clock-names = "cpu";
104 compatible = "arm,cortex-a7";
106 operating-points-v2 = <&cpu1_opp_table>;
107 cci-control-port = <&cci_control1>;
108 enable-method = "allwinner,sun8i-a83t-smp";
113 compatible = "arm,cortex-a7";
115 operating-points-v2 = <&cpu1_opp_table>;
116 cci-control-port = <&cci_control1>;
117 enable-method = "allwinner,sun8i-a83t-smp";
122 compatible = "arm,cortex-a7";
124 operating-points-v2 = <&cpu1_opp_table>;
125 cci-control-port = <&cci_control1>;
126 enable-method = "allwinner,sun8i-a83t-smp";
131 compatible = "arm,cortex-a7";
133 operating-points-v2 = <&cpu1_opp_table>;
134 cci-control-port = <&cci_control1>;
135 enable-method = "allwinner,sun8i-a83t-smp";
141 compatible = "arm,armv7-timer";
149 #address-cells = <1>;
150 #size-cells = <1>;
155 #clock-cells = <0>;
156 compatible = "fixed-clock";
157 clock-frequency = <24000000>;
158 clock-accuracy = <50000>;
159 clock-output-names = "osc24M";
164 * It is an internal RC-based oscillator.
168 #clock-cells = <0>;
169 compatible = "fixed-clock";
170 clock-frequency = <16000000>;
171 clock-output-names = "osc16M";
175 #clock-cells = <0>;
176 compatible = "fixed-factor-clock";
177 clock-div = <512>;
178 clock-mult = <1>;
180 clock-output-names = "osc16M-d512";
184 de: display-engine {
185 compatible = "allwinner,sun8i-a83t-display-engine";
196 compatible = "operating-points-v2";
197 opp-shared;
199 opp-480000000 {
200 opp-hz = /bits/ 64 <480000000>;
201 opp-microvolt = <840000>;
202 clock-latency-ns = <244144>; /* 8 32k periods */
205 opp-600000000 {
206 opp-hz = /bits/ 64 <600000000>;
207 opp-microvolt = <840000>;
208 clock-latency-ns = <244144>; /* 8 32k periods */
211 opp-720000000 {
212 opp-hz = /bits/ 64 <720000000>;
213 opp-microvolt = <840000>;
214 clock-latency-ns = <244144>; /* 8 32k periods */
217 opp-864000000 {
218 opp-hz = /bits/ 64 <864000000>;
219 opp-microvolt = <840000>;
220 clock-latency-ns = <244144>; /* 8 32k periods */
223 opp-912000000 {
224 opp-hz = /bits/ 64 <912000000>;
225 opp-microvolt = <840000>;
226 clock-latency-ns = <244144>; /* 8 32k periods */
229 opp-1008000000 {
230 opp-hz = /bits/ 64 <1008000000>;
231 opp-microvolt = <840000>;
232 clock-latency-ns = <244144>; /* 8 32k periods */
235 opp-1128000000 {
236 opp-hz = /bits/ 64 <1128000000>;
237 opp-microvolt = <840000>;
238 clock-latency-ns = <244144>; /* 8 32k periods */
241 opp-1200000000 {
242 opp-hz = /bits/ 64 <1200000000>;
243 opp-microvolt = <840000>;
244 clock-latency-ns = <244144>; /* 8 32k periods */
249 compatible = "operating-points-v2";
250 opp-shared;
252 opp-480000000 {
253 opp-hz = /bits/ 64 <480000000>;
254 opp-microvolt = <840000>;
255 clock-latency-ns = <244144>; /* 8 32k periods */
258 opp-600000000 {
259 opp-hz = /bits/ 64 <600000000>;
260 opp-microvolt = <840000>;
261 clock-latency-ns = <244144>; /* 8 32k periods */
264 opp-720000000 {
265 opp-hz = /bits/ 64 <720000000>;
266 opp-microvolt = <840000>;
267 clock-latency-ns = <244144>; /* 8 32k periods */
270 opp-864000000 {
271 opp-hz = /bits/ 64 <864000000>;
272 opp-microvolt = <840000>;
273 clock-latency-ns = <244144>; /* 8 32k periods */
276 opp-912000000 {
277 opp-hz = /bits/ 64 <912000000>;
278 opp-microvolt = <840000>;
279 clock-latency-ns = <244144>; /* 8 32k periods */
282 opp-1008000000 {
283 opp-hz = /bits/ 64 <1008000000>;
284 opp-microvolt = <840000>;
285 clock-latency-ns = <244144>; /* 8 32k periods */
288 opp-1128000000 {
289 opp-hz = /bits/ 64 <1128000000>;
290 opp-microvolt = <840000>;
291 clock-latency-ns = <244144>; /* 8 32k periods */
294 opp-1200000000 {
295 opp-hz = /bits/ 64 <1200000000>;
296 opp-microvolt = <840000>;
297 clock-latency-ns = <244144>; /* 8 32k periods */
302 compatible = "simple-bus";
303 #address-cells = <1>;
304 #size-cells = <1>;
307 display_clocks: clock@1000000 {
308 compatible = "allwinner,sun8i-a83t-de2-clk";
312 clock-names = "mod",
315 #clock-cells = <1>;
316 #reset-cells = <1>;
320 compatible = "allwinner,sun8i-a83t-de2-mixer-0";
324 clock-names = "bus",
329 #address-cells = <1>;
330 #size-cells = <0>;
333 #address-cells = <1>;
334 #size-cells = <0>;
339 remote-endpoint = <&tcon0_in_mixer0>;
346 compatible = "allwinner,sun8i-a83t-de2-mixer-1";
350 clock-names = "bus",
355 #address-cells = <1>;
356 #size-cells = <0>;
362 remote-endpoint = <&tcon1_in_mixer1>;
369 compatible = "allwinner,sun8i-a83t-cpucfg";
374 compatible = "arm,cci-400";
375 #address-cells = <1>;
376 #size-cells = <1>;
380 cci_control0: slave-if@4000 {
381 compatible = "arm,cci-400-ctrl-if";
382 interface-type = "ace";
386 cci_control1: slave-if@5000 {
387 compatible = "arm,cci-400-ctrl-if";
388 interface-type = "ace";
393 compatible = "arm,cci-400-pmu,r1";
407 compatible = "allwinner,sun8i-a83t-system-controller",
412 dma: dma-controller@1c02000 {
413 compatible = "allwinner,sun8i-a83t-dma";
418 #dma-cells = <1>;
421 tcon0: lcd-controller@1c0c000 { label
422 compatible = "allwinner,sun8i-a83t-tcon-lcd";
426 clock-names = "ahb", "tcon-ch0";
427 clock-output-names = "tcon-pixel-clock";
429 reset-names = "lcd", "lvds";
432 #address-cells = <1>;
433 #size-cells = <0>;
436 #address-cells = <1>;
437 #size-cells = <0>;
442 remote-endpoint = <&mixer0_out_tcon0>;
447 #address-cells = <1>;
448 #size-cells = <0>;
454 tcon1: lcd-controller@1c0d000 {
455 compatible = "allwinner,sun8i-a83t-tcon-tv";
459 clock-names = "ahb", "tcon-ch1";
461 reset-names = "lcd";
464 #address-cells = <1>;
465 #size-cells = <0>;
471 remote-endpoint = <&mixer1_out_tcon1>;
476 #address-cells = <1>;
477 #size-cells = <0>;
482 remote-endpoint = <&hdmi_in_tcon1>;
489 compatible = "allwinner,sun8i-a83t-mmc",
490 "allwinner,sun7i-a20-mmc";
496 clock-names = "ahb",
501 reset-names = "ahb";
504 #address-cells = <1>;
505 #size-cells = <0>;
509 compatible = "allwinner,sun8i-a83t-mmc",
510 "allwinner,sun7i-a20-mmc";
516 clock-names = "ahb",
521 reset-names = "ahb";
523 pinctrl-names = "default";
524 pinctrl-0 = <&mmc1_pins>;
526 #address-cells = <1>;
527 #size-cells = <0>;
531 compatible = "allwinner,sun8i-a83t-emmc";
537 clock-names = "ahb",
542 reset-names = "ahb";
545 #address-cells = <1>;
546 #size-cells = <0>;
550 compatible = "allwinner,sun8i-a83t-sid";
555 compatible = "allwinner,sun8i-a83t-musb",
556 "allwinner,sun8i-a33-musb";
561 interrupt-names = "mc";
563 phy-names = "usb";
569 compatible = "allwinner,sun8i-a83t-usb-phy";
573 reg-names = "phy_ctrl",
580 clock-names = "usb0_phy",
587 reset-names = "usb0_reset",
591 #phy-cells = <1>;
595 compatible = "allwinner,sun8i-a83t-ehci",
596 "generic-ehci";
602 phy-names = "usb";
607 compatible = "allwinner,sun8i-a83t-ohci",
608 "generic-ohci";
614 phy-names = "usb";
619 compatible = "allwinner,sun8i-a83t-ehci",
620 "generic-ehci";
626 phy-names = "usb";
630 ccu: clock@1c20000 {
631 compatible = "allwinner,sun8i-a83t-ccu";
634 clock-names = "hosc", "losc";
635 #clock-cells = <1>;
636 #reset-cells = <1>;
640 compatible = "allwinner,sun8i-a83t-pinctrl";
646 clock-names = "apb", "hosc", "losc";
647 gpio-controller;
648 interrupt-controller;
649 #interrupt-cells = <3>;
650 #gpio-cells = <3>;
652 emac_rgmii_pins: emac-rgmii-pins {
661 drive-strength = <40>;
664 hdmi_pins: hdmi-pins {
669 i2c0_pins: i2c0-pins {
674 i2c1_pins: i2c1-pins {
679 i2c2_ph_pins: i2c2-ph-pins {
684 i2s1_pins: i2s1-pins {
690 lcd_lvds_pins: lcd-lvds-pins {
696 mmc0_pins: mmc0-pins {
700 drive-strength = <30>;
701 bias-pull-up;
704 mmc1_pins: mmc1-pins {
708 drive-strength = <30>;
709 bias-pull-up;
712 mmc2_8bit_emmc_pins: mmc2-8bit-emmc-pins {
717 drive-strength = <30>;
718 bias-pull-up;
721 pwm_pin: pwm-pin {
726 spdif_tx_pin: spdif-tx-pin {
731 uart0_pb_pins: uart0-pb-pins {
736 uart0_pf_pins: uart0-pf-pins {
741 uart1_pins: uart1-pins {
746 uart1_rts_cts_pins: uart1-rts-cts-pins {
753 compatible = "allwinner,sun4i-a10-timer";
761 compatible = "allwinner,sun6i-a31-wdt";
768 #sound-dai-cells = <0>;
769 compatible = "allwinner,sun8i-a83t-spdif",
770 "allwinner,sun8i-h3-spdif";
775 clock-names = "apb", "spdif";
777 dma-names = "tx";
778 pinctrl-names = "default";
779 pinctrl-0 = <&spdif_tx_pin>;
784 #sound-dai-cells = <0>;
785 compatible = "allwinner,sun8i-a83t-i2s";
789 clock-names = "apb", "mod";
792 dma-names = "rx", "tx";
797 #sound-dai-cells = <0>;
798 compatible = "allwinner,sun8i-a83t-i2s";
802 clock-names = "apb", "mod";
805 dma-names = "rx", "tx";
806 pinctrl-names = "default";
807 pinctrl-0 = <&i2s1_pins>;
812 #sound-dai-cells = <0>;
813 compatible = "allwinner,sun8i-a83t-i2s";
817 clock-names = "apb", "mod";
820 dma-names = "tx";
825 compatible = "allwinner,sun8i-a83t-pwm",
826 "allwinner,sun8i-h3-pwm";
829 #pwm-cells = <3>;
834 compatible = "snps,dw-apb-uart";
837 reg-shift = <2>;
838 reg-io-width = <4>;
845 compatible = "snps,dw-apb-uart";
848 reg-shift = <2>;
849 reg-io-width = <4>;
856 compatible = "allwinner,sun8i-a83t-i2c",
857 "allwinner,sun6i-a31-i2c";
862 pinctrl-names = "default";
863 pinctrl-0 = <&i2c0_pins>;
865 #address-cells = <1>;
866 #size-cells = <0>;
870 compatible = "allwinner,sun8i-a83t-i2c",
871 "allwinner,sun6i-a31-i2c";
876 pinctrl-names = "default";
877 pinctrl-0 = <&i2c1_pins>;
879 #address-cells = <1>;
880 #size-cells = <0>;
884 compatible = "allwinner,sun8i-a83t-i2c",
885 "allwinner,sun6i-a31-i2c";
891 #address-cells = <1>;
892 #size-cells = <0>;
896 compatible = "allwinner,sun8i-a83t-emac";
900 interrupt-names = "macirq";
902 reset-names = "stmmaceth";
904 clock-names = "stmmaceth";
905 #address-cells = <1>;
906 #size-cells = <0>;
910 compatible = "snps,dwmac-mdio";
911 #address-cells = <1>;
912 #size-cells = <0>;
916 gic: interrupt-controller@1c81000 {
917 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
922 interrupt-controller;
923 #interrupt-cells = <3>;
928 compatible = "allwinner,sun8i-a83t-dw-hdmi";
930 reg-io-width = <1>;
934 clock-names = "iahb", "isfr", "tmds";
936 reset-names = "ctrl";
938 phy-names = "hdmi-phy";
939 pinctrl-names = "default";
940 pinctrl-0 = <&hdmi_pins>;
944 #address-cells = <1>;
945 #size-cells = <0>;
951 remote-endpoint = <&tcon1_out_hdmi>;
961 hdmi_phy: hdmi-phy@1ef0000 {
962 compatible = "allwinner,sun8i-a83t-hdmi-phy";
965 clock-names = "bus", "mod";
967 reset-names = "phy";
968 #phy-cells = <0>;
971 r_intc: interrupt-controller@1f00c00 {
972 compatible = "allwinner,sun8i-a83t-r-intc",
973 "allwinner,sun6i-a31-r-intc";
974 interrupt-controller;
975 #interrupt-cells = <2>;
980 r_ccu: clock@1f01400 {
981 compatible = "allwinner,sun8i-a83t-r-ccu";
985 clock-names = "hosc", "losc", "iosc", "pll-periph";
986 #clock-cells = <1>;
987 #reset-cells = <1>;
991 compatible = "allwinner,sun8i-a83t-r-cpucfg";
996 compatible = "allwinner,sun8i-a83t-r-pinctrl";
1001 clock-names = "apb", "hosc", "losc";
1002 gpio-controller;
1003 #gpio-cells = <3>;
1004 interrupt-controller;
1005 #interrupt-cells = <3>;
1007 r_rsb_pins: r-rsb-pins {
1010 drive-strength = <20>;
1011 bias-pull-up;
1016 compatible = "allwinner,sun8i-a83t-rsb",
1017 "allwinner,sun8i-a23-rsb";
1021 clock-frequency = <3000000>;
1023 pinctrl-names = "default";
1024 pinctrl-0 = <&r_rsb_pins>;
1026 #address-cells = <1>;
1027 #size-cells = <0>;