Lines Matching refs:ccu
49 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
50 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
64 clocks = <&ccu CLK_BUS_LCD>, <&ccu CLK_BUS_DE_BE>,
65 <&ccu CLK_LCD_CH0>, <&ccu CLK_DE_BE>,
66 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_DRC>;
131 clocks = <&ccu CLK_BUS_DMA>;
132 resets = <&ccu RST_BUS_DMA>;
139 clocks = <&ccu CLK_BUS_MMC0>,
140 <&ccu CLK_MMC0>,
141 <&ccu CLK_MMC0_OUTPUT>,
142 <&ccu CLK_MMC0_SAMPLE>;
147 resets = <&ccu RST_BUS_MMC0>;
158 clocks = <&ccu CLK_BUS_MMC1>,
159 <&ccu CLK_MMC1>,
160 <&ccu CLK_MMC1_OUTPUT>,
161 <&ccu CLK_MMC1_SAMPLE>;
166 resets = <&ccu RST_BUS_MMC1>;
177 clocks = <&ccu CLK_BUS_MMC2>,
178 <&ccu CLK_MMC2>,
179 <&ccu CLK_MMC2_OUTPUT>,
180 <&ccu CLK_MMC2_SAMPLE>;
185 resets = <&ccu RST_BUS_MMC2>;
197 clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
199 resets = <&ccu RST_BUS_NAND>;
211 clocks = <&ccu CLK_BUS_OTG>;
212 resets = <&ccu RST_BUS_OTG>;
226 clocks = <&ccu CLK_USB_PHY0>,
227 <&ccu CLK_USB_PHY1>;
230 resets = <&ccu RST_USB_PHY0>,
231 <&ccu RST_USB_PHY1>;
242 clocks = <&ccu CLK_BUS_EHCI>;
243 resets = <&ccu RST_BUS_EHCI>;
253 clocks = <&ccu CLK_BUS_OHCI>, <&ccu CLK_USB_OHCI>;
254 resets = <&ccu RST_BUS_OHCI>;
260 ccu: clock@1c20000 { label
272 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
415 clocks = <&ccu CLK_BUS_UART0>;
416 resets = <&ccu RST_BUS_UART0>;
428 clocks = <&ccu CLK_BUS_UART1>;
429 resets = <&ccu RST_BUS_UART1>;
441 clocks = <&ccu CLK_BUS_UART2>;
442 resets = <&ccu RST_BUS_UART2>;
454 clocks = <&ccu CLK_BUS_UART3>;
455 resets = <&ccu RST_BUS_UART3>;
467 clocks = <&ccu CLK_BUS_UART4>;
468 resets = <&ccu RST_BUS_UART4>;
478 clocks = <&ccu CLK_BUS_I2C0>;
479 resets = <&ccu RST_BUS_I2C0>;
489 clocks = <&ccu CLK_BUS_I2C1>;
490 resets = <&ccu RST_BUS_I2C1>;
500 clocks = <&ccu CLK_BUS_I2C2>;
501 resets = <&ccu RST_BUS_I2C2>;
525 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
527 resets = <&ccu RST_BUS_GPU>;
530 assigned-clocks = <&ccu CLK_GPU>;