Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:apb0 +full:- +full:gates +full:- +full:clk
2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
50 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
53 interrupt-parent = <&gic>;
56 #address-cells = <1>;
57 #size-cells = <1>;
61 compatible = "allwinner,simple-framebuffer",
62 "simple-framebuffer";
63 allwinner,pipeline = "de_be0-lcd0";
72 compatible = "arm,armv7-timer";
77 clock-frequency = <24000000>;
78 arm,cpu-registers-not-fw-configured;
82 enable-method = "allwinner,sun8i-a23";
83 #address-cells = <1>;
84 #size-cells = <0>;
87 compatible = "arm,cortex-a7";
93 compatible = "arm,cortex-a7";
100 #address-cells = <1>;
101 #size-cells = <1>;
105 #clock-cells = <0>;
106 compatible = "fixed-clock";
107 clock-frequency = <24000000>;
108 clock-accuracy = <50000>;
109 clock-output-names = "osc24M";
113 #clock-cells = <0>;
114 compatible = "fixed-clock";
115 clock-frequency = <32768>;
116 clock-accuracy = <50000>;
117 clock-output-names = "ext-osc32k";
122 compatible = "simple-bus";
123 #address-cells = <1>;
124 #size-cells = <1>;
127 dma: dma-controller@1c02000 {
128 compatible = "allwinner,sun8i-a23-dma";
133 #dma-cells = <1>;
137 compatible = "allwinner,sun7i-a20-mmc";
143 clock-names = "ahb",
148 reset-names = "ahb";
151 #address-cells = <1>;
152 #size-cells = <0>;
156 compatible = "allwinner,sun7i-a20-mmc";
162 clock-names = "ahb",
167 reset-names = "ahb";
170 #address-cells = <1>;
171 #size-cells = <0>;
175 compatible = "allwinner,sun7i-a20-mmc";
181 clock-names = "ahb",
186 reset-names = "ahb";
189 #address-cells = <1>;
190 #size-cells = <0>;
194 compatible = "allwinner,sun4i-a10-nand";
198 clock-names = "ahb", "mod";
200 reset-names = "ahb";
201 pinctrl-names = "default";
202 pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
204 #address-cells = <1>;
205 #size-cells = <0>;
214 interrupt-names = "mc";
216 phy-names = "usb";
228 clock-names = "usb0_phy",
232 reset-names = "usb0_reset",
235 #phy-cells = <1>;
239 compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
245 phy-names = "usb";
250 compatible = "allwinner,sun8i-a23-ohci", "generic-ohci";
256 phy-names = "usb";
263 clock-names = "hosc", "losc";
264 #clock-cells = <1>;
265 #reset-cells = <1>;
273 clock-names = "apb", "hosc", "losc";
274 gpio-controller;
275 interrupt-controller;
276 #interrupt-cells = <3>;
277 #gpio-cells = <3>;
289 uart1_pins_cts_rts_a: uart1-cts-rts@0 {
298 drive-strength = <30>;
299 bias-pull-up;
306 drive-strength = <30>;
307 bias-pull-up;
316 drive-strength = <30>;
317 bias-pull-up;
320 nand_pins: nand-pins {
327 nand_pins_cs0: nand-pins-cs0 {
330 bias-pull-up;
333 nand_pins_cs1: nand-pins-cs1 {
336 bias-pull-up;
339 nand_pins_rb0: nand-pins-rb0 {
342 bias-pull-up;
345 nand_pins_rb1: nand-pins-rb1 {
348 bias-pull-up;
371 lcd_rgb666_pins: lcd-rgb666@0 {
381 compatible = "allwinner,sun4i-a10-timer";
389 compatible = "allwinner,sun6i-a31-wdt";
395 compatible = "allwinner,sun7i-a20-pwm";
398 #pwm-cells = <3>;
403 compatible = "allwinner,sun4i-a10-lradc-keys";
410 compatible = "snps,dw-apb-uart";
413 reg-shift = <2>;
414 reg-io-width = <4>;
418 dma-names = "rx", "tx";
423 compatible = "snps,dw-apb-uart";
426 reg-shift = <2>;
427 reg-io-width = <4>;
431 dma-names = "rx", "tx";
436 compatible = "snps,dw-apb-uart";
439 reg-shift = <2>;
440 reg-io-width = <4>;
444 dma-names = "rx", "tx";
449 compatible = "snps,dw-apb-uart";
452 reg-shift = <2>;
453 reg-io-width = <4>;
457 dma-names = "rx", "tx";
462 compatible = "snps,dw-apb-uart";
465 reg-shift = <2>;
466 reg-io-width = <4>;
470 dma-names = "rx", "tx";
475 compatible = "allwinner,sun6i-a31-i2c";
481 #address-cells = <1>;
482 #size-cells = <0>;
486 compatible = "allwinner,sun6i-a31-i2c";
492 #address-cells = <1>;
493 #size-cells = <0>;
497 compatible = "allwinner,sun6i-a31-i2c";
503 #address-cells = <1>;
504 #size-cells = <0>;
508 compatible = "allwinner,sun8i-a23-mali",
509 "allwinner,sun7i-a20-mali", "arm,mali-400";
518 interrupt-names = "gp",
526 clock-names = "bus", "core";
528 #cooling-cells = <2>;
530 assigned-clocks = <&ccu CLK_GPU>;
531 assigned-clock-rates = <384000000>;
534 gic: interrupt-controller@1c81000 {
535 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
540 interrupt-controller;
541 #interrupt-cells = <3>;
546 compatible = "allwinner,sun6i-a31-rtc";
550 clock-output-names = "osc32k";
552 #clock-cells = <1>;
555 nmi_intc: interrupt-controller@1f00c00 {
556 compatible = "allwinner,sun6i-a31-r-intc";
557 interrupt-controller;
558 #interrupt-cells = <2>;
564 compatible = "allwinner,sun8i-a23-prcm";
568 compatible = "fixed-factor-clock";
569 #clock-cells = <0>;
570 clock-div = <1>;
571 clock-mult = <1>;
573 clock-output-names = "ar100";
577 compatible = "fixed-factor-clock";
578 #clock-cells = <0>;
579 clock-div = <1>;
580 clock-mult = <1>;
582 clock-output-names = "ahb0";
585 apb0: apb0_clk { label
586 compatible = "allwinner,sun8i-a23-apb0-clk";
587 #clock-cells = <0>;
589 clock-output-names = "apb0";
593 compatible = "allwinner,sun8i-a23-apb0-gates-clk";
594 #clock-cells = <1>;
595 clocks = <&apb0>;
596 clock-output-names = "apb0_pio", "apb0_timer",
602 compatible = "allwinner,sun6i-a31-clock-reset";
603 #reset-cells = <1>;
606 codec_analog: codec-analog {
607 compatible = "allwinner,sun8i-a23-codec-analog";
612 compatible = "allwinner,sun8i-a23-cpuconfig";
617 compatible = "snps,dw-apb-uart";
620 reg-shift = <2>;
621 reg-io-width = <4>;
628 compatible = "allwinner,sun8i-a23-r-pinctrl";
632 clock-names = "apb", "hosc", "losc";
634 gpio-controller;
635 interrupt-controller;
636 #interrupt-cells = <3>;
637 #address-cells = <1>;
638 #size-cells = <0>;
639 #gpio-cells = <3>;
644 drive-strength = <20>;
645 bias-pull-up;
655 compatible = "allwinner,sun8i-a23-rsb";
659 clock-frequency = <3000000>;
661 pinctrl-names = "default";
662 pinctrl-0 = <&r_rsb_pins>;
664 #address-cells = <1>;
665 #size-cells = <0>;