Lines Matching +full:1 +full:e40000
61 #address-cells = <1>;
62 #size-cells = <1>;
76 framebuffer@1 {
99 #address-cells = <1>;
121 cpu@1 {
124 reg = <1>;
179 #address-cells = <1>;
180 #size-cells = <1>;
183 osc24M: clk@1c20050 {
206 mii_phy_tx_clk: clk@1 {
220 gmac_tx_clk: clk@1c20164 {
236 soc@1c00000 {
238 #address-cells = <1>;
239 #size-cells = <1>;
242 sram-controller@1c00000 {
245 #address-cells = <1>;
246 #size-cells = <1>;
252 #address-cells = <1>;
253 #size-cells = <1>;
266 #address-cells = <1>;
267 #size-cells = <1>;
278 nmi_intc: interrupt-controller@1c00030 {
286 dma: dma-controller@1c02000 {
294 nfc: nand@1c03000 {
303 #address-cells = <1>;
307 spi0: spi@1c05000 {
317 #address-cells = <1>;
322 spi1: spi@1c06000 {
332 #address-cells = <1>;
334 num-cs = <1>;
337 emac: ethernet@1c0b000 {
342 allwinner,sram = <&emac_sram 1>;
346 mdio: mdio@1c0b080 {
350 #address-cells = <1>;
354 tcon0: lcd-controller@1c0c000 {
370 #address-cells = <1>;
374 #address-cells = <1>;
383 tcon0_in_be1: endpoint@1 {
384 reg = <1>;
389 tcon0_out: port@1 {
390 #address-cells = <1>;
392 reg = <1>;
394 tcon0_out_hdmi: endpoint@1 {
395 reg = <1>;
397 allwinner,tcon-channel = <1>;
403 tcon1: lcd-controller@1c0d000 {
419 #address-cells = <1>;
423 #address-cells = <1>;
432 tcon1_in_be1: endpoint@1 {
433 reg = <1>;
438 tcon1_out: port@1 {
439 #address-cells = <1>;
441 reg = <1>;
443 tcon1_out_hdmi: endpoint@1 {
444 reg = <1>;
446 allwinner,tcon-channel = <1>;
452 mmc0: mmc@1c0f000 {
465 #address-cells = <1>;
469 mmc1: mmc@1c10000 {
482 #address-cells = <1>;
486 mmc2: mmc@1c11000 {
499 #address-cells = <1>;
503 mmc3: mmc@1c12000 {
516 #address-cells = <1>;
520 usb_otg: usb@1c13000 {
529 allwinner,sram = <&otg_sram 1>;
533 usbphy: phy@1c13400 {
534 #phy-cells = <1>;
547 ehci0: usb@1c14000 {
552 phys = <&usbphy 1>;
557 ohci0: usb@1c14400 {
562 phys = <&usbphy 1>;
567 crypto: crypto-engine@1c15000 {
576 hdmi: hdmi@1c16000 {
584 clock-names = "ahb", "mod", "pll-0", "pll-1";
592 #address-cells = <1>;
596 #address-cells = <1>;
605 hdmi_in_tcon1: endpoint@1 {
606 reg = <1>;
611 hdmi_out: port@1 {
612 #address-cells = <1>;
614 reg = <1>;
619 spi2: spi@1c17000 {
629 #address-cells = <1>;
631 num-cs = <1>;
634 ahci: sata@1c18000 {
642 ehci1: usb@1c1c000 {
652 ohci1: usb@1c1c400 {
662 spi3: spi@1c1f000 {
672 #address-cells = <1>;
674 num-cs = <1>;
677 ccu: clock@1c20000 {
682 #clock-cells = <1>;
683 #reset-cells = <1>;
686 pio: pinctrl@1c20800 {
769 ir0_tx_pins_a: ir0@1 {
779 ir1_tx_pins_a: ir1@1 {
864 spi2_pins_b: spi2@1 {
874 spi2_cs0_pins_b: spi2_cs0@1 {
894 uart3_pins_b: uart3@1 {
904 uart4_pins_b: uart4@1 {
925 timer@1c20c00 {
937 wdt: watchdog@1c20c90 {
942 rtc: rtc@1c20d00 {
948 pwm: pwm@1c20e00 {
956 spdif: spdif@1c21000 {
969 ir0: ir@1c21800 {
978 ir1: ir@1c21c00 {
987 i2s1: i2s@1c22000 {
1000 i2s0: i2s@1c22400 {
1013 lradc: lradc@1c22800 {
1020 codec: codec@1c22c00 {
1033 sid: eeprom@1c23800 {
1038 i2s2: i2s@1c24400 {
1051 rtp: rtp@1c25000 {
1058 uart0: serial@1c28000 {
1061 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
1068 uart1: serial@1c28400 {
1078 uart2: serial@1c28800 {
1088 uart3: serial@1c28c00 {
1098 uart4: serial@1c29000 {
1108 uart5: serial@1c29400 {
1118 uart6: serial@1c29800 {
1128 uart7: serial@1c29c00 {
1138 ps20: ps2@1c2a000 {
1146 ps21: ps2@1c2a400 {
1154 i2c0: i2c@1c2ac00 {
1161 #address-cells = <1>;
1165 i2c1: i2c@1c2b000 {
1172 #address-cells = <1>;
1176 i2c2: i2c@1c2b400 {
1183 #address-cells = <1>;
1187 i2c3: i2c@1c2b800 {
1194 #address-cells = <1>;
1198 can0: can@1c2bc00 {
1207 i2c4: i2c@1c2c000 {
1214 #address-cells = <1>;
1218 mali: gpu@1c40000 {
1243 gmac: ethernet@1c50000 {
1254 #address-cells = <1>;
1258 hstimer@1c60000 {
1268 gic: interrupt-controller@1c81000 {
1279 fe0: display-frontend@1e00000 {
1290 #address-cells = <1>;
1293 fe0_out: port@1 {
1294 #address-cells = <1>;
1296 reg = <1>;
1303 fe0_out_be1: endpoint@1 {
1304 reg = <1>;
1311 fe1: display-frontend@1e20000 {
1322 #address-cells = <1>;
1325 fe1_out: port@1 {
1326 #address-cells = <1>;
1328 reg = <1>;
1335 fe1_out_be1: endpoint@1 {
1336 reg = <1>;
1343 be1: display-backend@1e40000 {
1354 #address-cells = <1>;
1358 #address-cells = <1>;
1367 be1_in_fe1: endpoint@1 {
1368 reg = <1>;
1373 be1_out: port@1 {
1374 #address-cells = <1>;
1376 reg = <1>;
1383 be1_out_tcon1: endpoint@1 {
1384 reg = <1>;
1391 be0: display-backend@1e60000 {
1402 #address-cells = <1>;
1406 #address-cells = <1>;
1415 be0_in_fe1: endpoint@1 {
1416 reg = <1>;
1421 be0_out: port@1 {
1422 #address-cells = <1>;
1424 reg = <1>;
1431 be0_out_tcon1: endpoint@1 {
1432 reg = <1>;