arm/dts/sun5i.dtsi

47 #include <dt-bindings/clock/sun5i-ccu.h>
49 #include <dt-bindings/reset/sun5i-ccu.h>
62 			clocks = <&ccu CLK_CPU>;
75 			clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
76 				 <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
84 			clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
85 				 <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
86 				 <&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
157 			clocks = <&ccu CLK_AHB_DMA>;
165 			clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
178 			clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
192 			clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
205 			clocks = <&ccu CLK_AHB_TVE>;
206 			resets = <&ccu RST_TVE>;
224 			clocks = <&ccu CLK_AHB_EMAC>;
241 			resets = <&ccu RST_LCD>;
243 			clocks = <&ccu CLK_AHB_LCD>,
244 				 <&ccu CLK_TCON_CH0>,
245 				 <&ccu CLK_TCON_CH1>;
284 			clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>;
295 			clocks = <&ccu CLK_AHB_MMC1>, <&ccu CLK_MMC1>;
306 			clocks = <&ccu CLK_AHB_MMC2>, <&ccu CLK_MMC2>;
317 			clocks = <&ccu CLK_AHB_OTG>;
332 			clocks = <&ccu CLK_USB_PHY0>;
334 			resets = <&ccu RST_USB_PHY0>, <&ccu RST_USB_PHY1>;
343 			clocks = <&ccu CLK_AHB_EHCI>;
353 			clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>;
364 			clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
372 			clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
382 		ccu: clock@1c20000 {  label
400 			clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
545 			clocks = <&ccu CLK_HOSC>;
555 			clocks = <&ccu CLK_APB0_IR>, <&ccu CLK_IR>;
574 			clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
600 			clocks = <&ccu CLK_APB1_UART0>;
610 			clocks = <&ccu CLK_APB1_UART1>;
620 			clocks = <&ccu CLK_APB1_UART2>;
630 			clocks = <&ccu CLK_APB1_UART3>;
638 			clocks = <&ccu CLK_APB1_I2C0>;
648 			clocks = <&ccu CLK_APB1_I2C1>;
658 			clocks = <&ccu CLK_APB1_I2C2>;
668 			clocks = <&ccu CLK_AHB_HSTIMER>;
675 			clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>,
676 				 <&ccu CLK_DRAM_DE_FE>;
679 			resets = <&ccu RST_DE_FE>;
703 			clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
704 				 <&ccu CLK_DRAM_DE_BE>;
707 			resets = <&ccu RST_DE_BE>;
710 			assigned-clocks = <&ccu CLK_DE_BE>;