Lines Matching +full:tcon +full:- +full:lcd0

2  * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/clock/sun5i-ccu.h>
48 #include <dt-bindings/dma/sun4i-a10.h>
49 #include <dt-bindings/reset/sun5i-ccu.h>
52 interrupt-parent = <&intc>;
55 #address-cells = <1>;
56 #size-cells = <0>;
60 compatible = "arm,cortex-a8";
67 #address-cells = <1>;
68 #size-cells = <1>;
72 compatible = "allwinner,simple-framebuffer",
73 "simple-framebuffer";
74 allwinner,pipeline = "de_be0-lcd0";
81 compatible = "allwinner,simple-framebuffer",
82 "simple-framebuffer";
83 allwinner,pipeline = "de_be0-lcd0-tve0";
92 #address-cells = <1>;
93 #size-cells = <1>;
97 #clock-cells = <0>;
98 compatible = "fixed-clock";
99 clock-frequency = <24000000>;
100 clock-output-names = "osc24M";
104 #clock-cells = <0>;
105 compatible = "fixed-clock";
106 clock-frequency = <32768>;
107 clock-output-names = "osc32k";
112 compatible = "simple-bus";
113 #address-cells = <1>;
114 #size-cells = <1>;
117 sram-controller@1c00000 {
118 compatible = "allwinner,sun4i-a10-sram-controller";
120 #address-cells = <1>;
121 #size-cells = <1>;
125 compatible = "mmio-sram";
127 #address-cells = <1>;
128 #size-cells = <1>;
132 emac_sram: sram-section@8000 {
133 compatible = "allwinner,sun4i-a10-sram-a3-a4";
139 compatible = "mmio-sram";
141 #address-cells = <1>;
142 #size-cells = <1>;
145 otg_sram: sram-section@0 {
146 compatible = "allwinner,sun4i-a10-sram-d";
153 dma: dma-controller@1c02000 {
154 compatible = "allwinner,sun4i-a10-dma";
158 #dma-cells = <2>;
162 compatible = "allwinner,sun4i-a10-nand";
166 clock-names = "ahb", "mod";
168 dma-names = "rxtx";
170 #address-cells = <1>;
171 #size-cells = <0>;
175 compatible = "allwinner,sun4i-a10-spi";
179 clock-names = "ahb", "mod";
182 dma-names = "rx", "tx";
184 #address-cells = <1>;
185 #size-cells = <0>;
189 compatible = "allwinner,sun4i-a10-spi";
193 clock-names = "ahb", "mod";
196 dma-names = "rx", "tx";
198 #address-cells = <1>;
199 #size-cells = <0>;
202 tve0: tv-encoder@1c0a000 {
203 compatible = "allwinner,sun4i-a10-tv-encoder";
210 #address-cells = <1>;
211 #size-cells = <0>;
215 remote-endpoint = <&tcon0_out_tve0>;
221 compatible = "allwinner,sun4i-a10-emac";
230 compatible = "allwinner,sun4i-a10-mdio";
233 #address-cells = <1>;
234 #size-cells = <0>;
237 tcon0: lcd-controller@1c0c000 {
238 compatible = "allwinner,sun5i-a13-tcon";
242 reset-names = "lcd";
246 clock-names = "ahb",
247 "tcon-ch0",
248 "tcon-ch1";
249 clock-output-names = "tcon-pixel-clock";
253 #address-cells = <1>;
254 #size-cells = <0>;
257 #address-cells = <1>;
258 #size-cells = <0>;
263 remote-endpoint = <&be0_out_tcon0>;
268 #address-cells = <1>;
269 #size-cells = <0>;
274 remote-endpoint = <&tve0_in_tcon0>;
275 allwinner,tcon-channel = <1>;
282 compatible = "allwinner,sun5i-a13-mmc";
285 clock-names = "ahb", "mmc";
288 #address-cells = <1>;
289 #size-cells = <0>;
293 compatible = "allwinner,sun5i-a13-mmc";
296 clock-names = "ahb", "mmc";
299 #address-cells = <1>;
300 #size-cells = <0>;
304 compatible = "allwinner,sun5i-a13-mmc";
307 clock-names = "ahb", "mmc";
310 #address-cells = <1>;
311 #size-cells = <0>;
315 compatible = "allwinner,sun4i-a10-musb";
319 interrupt-names = "mc";
321 phy-names = "usb";
328 #phy-cells = <1>;
329 compatible = "allwinner,sun5i-a13-usb-phy";
331 reg-names = "phy_ctrl", "pmu1";
333 clock-names = "usb_phy";
335 reset-names = "usb0_reset", "usb1_reset";
340 compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";
345 phy-names = "usb";
350 compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";
355 phy-names = "usb";
359 crypto: crypto-engine@1c15000 {
360 compatible = "allwinner,sun5i-a13-crypto",
361 "allwinner,sun4i-a10-crypto";
365 clock-names = "ahb", "mod";
369 compatible = "allwinner,sun4i-a10-spi";
373 clock-names = "ahb", "mod";
376 dma-names = "rx", "tx";
378 #address-cells = <1>;
379 #size-cells = <0>;
385 clock-names = "hosc", "losc";
386 #clock-cells = <1>;
387 #reset-cells = <1>;
390 intc: interrupt-controller@1c20400 {
391 compatible = "allwinner,sun4i-a10-ic";
393 interrupt-controller;
394 #interrupt-cells = <1>;
401 clock-names = "apb", "hosc", "losc";
402 gpio-controller;
403 interrupt-controller;
404 #interrupt-cells = <3>;
405 #gpio-cells = <3>;
441 function = "lcd0";
449 function = "lcd0";
456 drive-strength = <30>;
457 bias-pull-up;
465 drive-strength = <30>;
466 bias-pull-up;
469 mmc2_4bit_pins_a: mmc2-4bit@0 {
473 drive-strength = <30>;
474 bias-pull-up;
477 nand_pins_a: nand-base0@0 {
485 nand_cs0_pins_a: nand-cs@0 {
490 nand_rb0_pins_a: nand-rb@0 {
500 spi2_cs0_pins_a: spi2-cs0@0 {
520 uart2_cts_rts_pins_a: uart2-cts-rts@0 {
530 uart3_cts_rts_pins_a: uart3-cts-rts@0 {
542 compatible = "allwinner,sun4i-a10-timer";
549 compatible = "allwinner,sun4i-a10-wdt";
554 compatible = "allwinner,sun4i-a10-ir";
556 clock-names = "apb", "ir";
563 compatible = "allwinner,sun4i-a10-lradc-keys";
570 #sound-dai-cells = <0>;
571 compatible = "allwinner,sun4i-a10-codec";
575 clock-names = "apb", "codec";
578 dma-names = "rx", "tx";
583 compatible = "allwinner,sun4i-a10-sid";
588 compatible = "allwinner,sun5i-a13-ts";
591 #thermal-sensor-cells = <0>;
595 compatible = "snps,dw-apb-uart";
598 reg-shift = <2>;
599 reg-io-width = <4>;
605 compatible = "snps,dw-apb-uart";
608 reg-shift = <2>;
609 reg-io-width = <4>;
615 compatible = "snps,dw-apb-uart";
618 reg-shift = <2>;
619 reg-io-width = <4>;
625 compatible = "snps,dw-apb-uart";
628 reg-shift = <2>;
629 reg-io-width = <4>;
635 compatible = "allwinner,sun4i-a10-i2c";
640 #address-cells = <1>;
641 #size-cells = <0>;
645 compatible = "allwinner,sun4i-a10-i2c";
650 #address-cells = <1>;
651 #size-cells = <0>;
655 compatible = "allwinner,sun4i-a10-i2c";
660 #address-cells = <1>;
661 #size-cells = <0>;
665 compatible = "allwinner,sun5i-a13-hstimer";
671 fe0: display-frontend@1e00000 {
672 compatible = "allwinner,sun5i-a13-display-frontend";
677 clock-names = "ahb", "mod",
683 #address-cells = <1>;
684 #size-cells = <0>;
687 #address-cells = <1>;
688 #size-cells = <0>;
693 remote-endpoint = <&be0_in_fe0>;
699 be0: display-backend@1e60000 {
700 compatible = "allwinner,sun5i-a13-display-backend";
705 clock-names = "ahb", "mod",
710 assigned-clocks = <&ccu CLK_DE_BE>;
711 assigned-clock-rates = <300000000>;
714 #address-cells = <1>;
715 #size-cells = <0>;
718 #address-cells = <1>;
719 #size-cells = <0>;
724 remote-endpoint = <&fe0_out_be0>;
729 #address-cells = <1>;
730 #size-cells = <0>;
735 remote-endpoint = <&tcon0_in_be0>;