arm/dts/sun50i-h6.dtsi

1 // SPDX-License-Identifier: (GPL-2.0+ or MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h6-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
13 	interrupt-parent = <&gic>;
14 	#address-cells = <1>;
15 	#size-cells = <1>;
18 		#address-cells = <1>;
19 		#size-cells = <0>;
22 			compatible = "arm,cortex-a53", "arm,armv8";
25 			enable-method = "psci";
29 			compatible = "arm,cortex-a53", "arm,armv8";
32 			enable-method = "psci";
36 			compatible = "arm,cortex-a53", "arm,armv8";
39 			enable-method = "psci";
43 			compatible = "arm,cortex-a53", "arm,armv8";
46 			enable-method = "psci";
50 	iosc: internal-osc-clk {
51 		#clock-cells = <0>;
52 		compatible = "fixed-clock";
53 		clock-frequency = <16000000>;
54 		clock-accuracy = <300000000>;
55 		clock-output-names = "iosc";
59 		#clock-cells = <0>;
60 		compatible = "fixed-clock";
61 		clock-frequency = <24000000>;
62 		clock-output-names = "osc24M";
66 		#clock-cells = <0>;
67 		compatible = "fixed-clock";
68 		clock-frequency = <32768>;
69 		clock-output-names = "osc32k";
73 		compatible = "arm,psci-0.2";
78 		compatible = "arm,armv8-timer";
90 		compatible = "simple-bus";
91 		#address-cells = <1>;
92 		#size-cells = <1>;
96 			compatible = "allwinner,sun50i-h6-ccu";
99 			clock-names = "hosc", "losc", "iosc";
100 			#clock-cells = <1>;
101 			#reset-cells = <1>;
104 		gic: interrupt-controller@3021000 {
105 			compatible = "arm,gic-400";
111 			interrupt-controller;
112 			#interrupt-cells = <3>;
116 			compatible = "allwinner,sun50i-h6-pinctrl";
123 			clock-names = "apb", "hosc", "losc";
124 			gpio-controller;
125 			#gpio-cells = <3>;
126 			interrupt-controller;
127 			#interrupt-cells = <3>;
129 			mmc0_pins: mmc0-pins {
133 				drive-strength = <30>;
134 				bias-pull-up;
137 			mmc2_pins: mmc2-pins {
142 				drive-strength = <30>;
143 				bias-pull-up;
146 			uart0_ph_pins: uart0-ph {
153 			compatible = "allwinner,sun50i-h6-mmc",
154 				     "allwinner,sun50i-a64-mmc";
157 			clock-names = "ahb", "mmc";
159 			reset-names = "ahb";
162 			#address-cells = <1>;
163 			#size-cells = <0>;
167 			compatible = "allwinner,sun50i-h6-mmc",
168 				     "allwinner,sun50i-a64-mmc";
171 			clock-names = "ahb", "mmc";
173 			reset-names = "ahb";
176 			#address-cells = <1>;
177 			#size-cells = <0>;
181 			compatible = "allwinner,sun50i-h6-emmc",
182 				     "allwinner,sun50i-a64-emmc";
185 			clock-names = "ahb", "mmc";
187 			reset-names = "ahb";
190 			#address-cells = <1>;
191 			#size-cells = <0>;
195 			compatible = "snps,dw-apb-uart";
198 			reg-shift = <2>;
199 			reg-io-width = <4>;
206 			compatible = "snps,dw-apb-uart";
209 			reg-shift = <2>;
210 			reg-io-width = <4>;
217 			compatible = "snps,dw-apb-uart";
220 			reg-shift = <2>;
221 			reg-io-width = <4>;
228 			compatible = "snps,dw-apb-uart";
231 			reg-shift = <2>;
232 			reg-io-width = <4>;
239 			compatible = "allwinner,sun50i-h6-r-ccu";
243 			clock-names = "hosc", "losc", "iosc", "pll-periph";
244 			#clock-cells = <1>;
245 			#reset-cells = <1>;
248 		r_intc: interrupt-controller@7021000 {
249 			compatible = "allwinner,sun50i-h6-r-intc",
250 				     "allwinner,sun6i-a31-r-intc";
251 			interrupt-controller;
252 			#interrupt-cells = <2>;
258 			compatible = "allwinner,sun50i-h6-r-pinctrl";
263 			clock-names = "apb", "hosc", "losc";
264 			gpio-controller;
265 			#gpio-cells = <3>;
266 			interrupt-controller;
267 			#interrupt-cells = <3>;
269 			r_i2c_pins: r-i2c {
276 			compatible = "allwinner,sun6i-a31-i2c";
281 			pinctrl-names = "default";
282 			pinctrl-0 = <&r_i2c_pins>;
284 			#address-cells = <1>;
285 			#size-cells = <0>;