Lines Matching +full:stm32 +full:- +full:cec
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
25 compatible = "arm,cortex-a7";
60 intc: interrupt-controller@a0021000 {
61 compatible = "arm,cortex-a7-gic";
62 #interrupt-cells = <3>;
63 interrupt-controller;
69 compatible = "arm,armv7-timer";
74 interrupt-parent = <&intc>;
78 clk_hse: clk-hse {
79 #clock-cells = <0>;
80 compatible = "fixed-clock";
81 clock-frequency = <24000000>;
84 clk_hsi: clk-hsi {
85 #clock-cells = <0>;
86 compatible = "fixed-clock";
87 clock-frequency = <64000000>;
90 clk_lse: clk-lse {
91 #clock-cells = <0>;
92 compatible = "fixed-clock";
93 clock-frequency = <32768>;
96 clk_lsi: clk-lsi {
97 #clock-cells = <0>;
98 compatible = "fixed-clock";
99 clock-frequency = <32000>;
102 clk_csi: clk-csi {
103 #clock-cells = <0>;
104 compatible = "fixed-clock";
105 clock-frequency = <4000000>;
110 #address-cells = <1>;
111 #size-cells = <0>;
112 compatible = "st,stm32mp157c-pd";
114 pd_core_ret: core-ret-power-domain@1 {
115 #address-cells = <1>;
116 #size-cells = <0>;
118 #power-domain-cells = <0>;
119 label = "CORE-RETENTION";
121 pd_core: core-power-domain@2 {
123 #power-domain-cells = <0>;
130 compatible = "simple-bus";
131 #address-cells = <1>;
132 #size-cells = <1>;
133 interrupt-parent = <&intc>;
137 #address-cells = <1>;
138 #size-cells = <0>;
139 compatible = "st,stm32-timers";
142 clock-names = "int";
146 compatible = "st,stm32-pwm";
151 compatible = "st,stm32h7-timer-trigger";
158 #address-cells = <1>;
159 #size-cells = <0>;
160 compatible = "st,stm32-timers";
163 clock-names = "int";
167 compatible = "st,stm32-pwm";
172 compatible = "st,stm32h7-timer-trigger";
179 #address-cells = <1>;
180 #size-cells = <0>;
181 compatible = "st,stm32-timers";
184 clock-names = "int";
188 compatible = "st,stm32-pwm";
193 compatible = "st,stm32h7-timer-trigger";
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "st,stm32-timers";
205 clock-names = "int";
209 compatible = "st,stm32-pwm";
214 compatible = "st,stm32h7-timer-trigger";
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "st,stm32-timers";
226 clock-names = "int";
230 compatible = "st,stm32h7-timer-trigger";
237 #address-cells = <1>;
238 #size-cells = <0>;
239 compatible = "st,stm32-timers";
242 clock-names = "int";
246 compatible = "st,stm32h7-timer-trigger";
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "st,stm32-timers";
258 clock-names = "int";
262 compatible = "st,stm32-pwm";
267 compatible = "st,stm32h7-timer-trigger";
274 #address-cells = <1>;
275 #size-cells = <0>;
276 compatible = "st,stm32-timers";
279 clock-names = "int";
283 compatible = "st,stm32-pwm";
288 compatible = "st,stm32h7-timer-trigger";
295 #address-cells = <1>;
296 #size-cells = <0>;
297 compatible = "st,stm32-timers";
300 clock-names = "int";
304 compatible = "st,stm32-pwm";
309 compatible = "st,stm32h7-timer-trigger";
316 #address-cells = <1>;
317 #size-cells = <0>;
318 compatible = "st,stm32-lptimer";
321 clock-names = "mux";
325 compatible = "st,stm32-pwm-lp";
326 #pwm-cells = <3>;
331 compatible = "st,stm32-lptimer-trigger";
337 compatible = "st,stm32-lptimer-counter";
343 compatible = "st,stm32h7-uart";
351 compatible = "st,stm32h7-uart";
359 compatible = "st,stm32h7-uart";
367 compatible = "st,stm32h7-uart";
375 compatible = "st,stm32f7-i2c";
377 interrupt-names = "event", "error";
382 #address-cells = <1>;
383 #size-cells = <0>;
388 compatible = "st,stm32f7-i2c";
390 interrupt-names = "event", "error";
395 #address-cells = <1>;
396 #size-cells = <0>;
401 compatible = "st,stm32f7-i2c";
403 interrupt-names = "event", "error";
408 #address-cells = <1>;
409 #size-cells = <0>;
414 compatible = "st,stm32f7-i2c";
416 interrupt-names = "event", "error";
421 #address-cells = <1>;
422 #size-cells = <0>;
426 cec: cec@40016000 { label
427 compatible = "st,stm32-cec";
431 clock-names = "cec", "hdmi-cec";
436 compatible = "st,stm32h7-dac-core";
439 clock-names = "pclk";
440 #address-cells = <1>;
441 #size-cells = <0>;
445 compatible = "st,stm32-dac";
446 #io-channels-cells = <1>;
452 compatible = "st,stm32-dac";
453 #io-channels-cells = <1>;
460 compatible = "st,stm32h7-uart";
468 compatible = "st,stm32h7-uart";
476 #address-cells = <1>;
477 #size-cells = <0>;
478 compatible = "st,stm32-timers";
481 clock-names = "int";
485 compatible = "st,stm32-pwm";
490 compatible = "st,stm32h7-timer-trigger";
497 #address-cells = <1>;
498 #size-cells = <0>;
499 compatible = "st,stm32-timers";
502 clock-names = "int";
506 compatible = "st,stm32-pwm";
511 compatible = "st,stm32h7-timer-trigger";
518 compatible = "st,stm32h7-uart";
526 #address-cells = <1>;
527 #size-cells = <0>;
528 compatible = "st,stm32-timers";
531 clock-names = "int";
535 compatible = "st,stm32-pwm";
540 compatible = "st,stm32h7-timer-trigger";
547 #address-cells = <1>;
548 #size-cells = <0>;
549 compatible = "st,stm32-timers";
552 clock-names = "int";
556 compatible = "st,stm32-pwm";
560 compatible = "st,stm32h7-timer-trigger";
567 #address-cells = <1>;
568 #size-cells = <0>;
569 compatible = "st,stm32-timers";
572 clock-names = "int";
576 compatible = "st,stm32-pwm";
581 compatible = "st,stm32h7-timer-trigger";
588 compatible = "st,stm32-dma";
599 #dma-cells = <4>;
601 dma-requests = <8>;
605 compatible = "st,stm32-dma";
616 #dma-cells = <4>;
618 dma-requests = <8>;
621 dmamux1: dma-router@48002000 {
622 compatible = "st,stm32h7-dmamux";
624 #dma-cells = <3>;
625 dma-requests = <128>;
626 dma-masters = <&dma1 &dma2>;
627 dma-channels = <16>;
632 compatible = "st,stm32mp1-adc-core";
637 clock-names = "bus", "adc";
638 interrupt-controller;
639 #interrupt-cells = <1>;
640 #address-cells = <1>;
641 #size-cells = <0>;
645 compatible = "st,stm32mp1-adc";
646 #io-channel-cells = <1>;
648 interrupt-parent = <&adc>;
654 compatible = "st,stm32mp1-adc";
655 #io-channel-cells = <1>;
657 interrupt-parent = <&adc>;
664 compatible = "st,stm32-sdmmc2";
666 reg-names = "sdmmc", "delay";
671 cap-sd-highspeed;
672 cap-mmc-highspeed;
673 max-frequency = <120000000>;
677 usbotg_hs: usb-otg@49000000 {
678 compatible = "st,stm32mp1-hsotg", "snps,dwc2";
681 clock-names = "otg";
683 reset-names = "dwc2";
685 g-rx-fifo-size = <256>;
686 g-np-tx-fifo-size = <32>;
687 g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
689 power-domains = <&pd_core>;
694 compatible = "st,stm32-hwspinlock";
695 #hwlock-cells = <1>;
698 clock-names = "hwspinlock";
703 compatible = "st,stm32mp1-rcc", "syscon";
705 #clock-cells = <1>;
706 #reset-cells = <1>;
709 rcc_reboot: rcc-reboot@50000000 {
710 compatible = "syscon-reboot";
717 compatible = "st,stm32mp1-pwr", "st,stm32-pwr", "syscon", "simple-mfd";
719 system-power-controller;
723 clock-names = "phyclk";
725 pwr-regulators@c {
726 compatible = "st,stm32mp1,pwr-reg";
730 regulator-name = "reg11";
731 regulator-min-microvolt = <1100000>;
732 regulator-max-microvolt = <1100000>;
736 regulator-name = "reg18";
737 regulator-min-microvolt = <1800000>;
738 regulator-max-microvolt = <1800000>;
742 regulator-name = "usb33";
743 regulator-min-microvolt = <3300000>;
744 regulator-max-microvolt = <3300000>;
749 exti: interrupt-controller@5000d000 {
750 compatible = "st,stm32mp1-exti", "syscon";
751 interrupt-controller;
752 #interrupt-cells = <2>;
756 syscfg: system-config@50020000 {
757 compatible = "st,stm32-syscfg", "syscon";
762 #address-cells = <1>;
763 #size-cells = <0>;
764 compatible = "st,stm32-lptimer";
767 clock-names = "mux";
771 compatible = "st,stm32-pwm-lp";
772 #pwm-cells = <3>;
777 compatible = "st,stm32-lptimer-trigger";
783 compatible = "st,stm32-lptimer-counter";
789 #address-cells = <1>;
790 #size-cells = <0>;
791 compatible = "st,stm32-lptimer";
794 clock-names = "mux";
798 compatible = "st,stm32-pwm-lp";
799 #pwm-cells = <3>;
804 compatible = "st,stm32-lptimer-trigger";
811 compatible = "st,stm32-lptimer";
814 clock-names = "mux";
818 compatible = "st,stm32-pwm-lp";
819 #pwm-cells = <3>;
825 compatible = "st,stm32-lptimer";
828 clock-names = "mux";
832 compatible = "st,stm32-pwm-lp";
833 #pwm-cells = <3>;
839 compatible = "st,stm32-vrefbuf";
841 regulator-min-microvolt = <1500000>;
842 regulator-max-microvolt = <2500000>;
848 compatible = "st,stm32mp1-cryp";
857 compatible = "st,stm32-rng";
865 compatible = "st,stm32h7-mdma";
869 #dma-cells = <5>;
870 dma-channels = <32>;
871 dma-requests = <48>;
875 compatible = "st,stm32f469-qspi";
877 reg-names = "qspi", "qspi_mm";
885 compatible = "st,stm32-sdmmc2";
887 reg-names = "sdmmc", "delay";
891 cap-sd-highspeed;
892 cap-mmc-highspeed;
893 max-frequency = <120000000>;
898 compatible = "st,stm32-sdmmc2";
900 reg-names = "sdmmc", "delay";
905 cap-sd-highspeed;
906 cap-mmc-highspeed;
907 max-frequency = <120000000>;
912 compatible = "st,stm32f7-crc";
918 usbh_ohci: usbh-ohci@5800c000 {
919 compatible = "generic-ohci";
927 usbh_ehci: usbh-ehci@5800d000 {
928 compatible = "generic-ehci";
938 compatible = "st,stm32-dsi";
941 clock-names = "pclk", "ref", "px_clk";
943 reset-names = "apb";
947 ltdc: display-controller@5a001000 {
948 compatible = "st,stm32-ltdc";
953 clock-names = "lcd";
959 #address-cells = <1>;
960 #size-cells = <0>;
961 compatible = "st,stm32mp1-usbphyc";
967 usbphyc_port0: usb-phy@0 {
968 #phy-cells = <0>;
972 usbphyc_port1: usb-phy@1 {
973 #phy-cells = <1>;
979 compatible = "st,stm32h7-uart";
987 compatible = "st,stm32f7-i2c";
989 interrupt-names = "event", "error";
994 #address-cells = <1>;
995 #size-cells = <0>;
1000 compatible = "st,stm32f7-i2c";
1002 interrupt-names = "event", "error";
1007 #address-cells = <1>;
1008 #size-cells = <0>;