Lines Matching +full:0 +full:x54001000
16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
34 cpu_off = <0x84000002>;
35 cpu_on = <0x84000003>;
64 reg = <0xa0021000 0x1000>,
65 <0xa0022000 0x2000>;
79 #clock-cells = <0>;
85 #clock-cells = <0>;
91 #clock-cells = <0>;
97 #clock-cells = <0>;
103 #clock-cells = <0>;
111 #size-cells = <0>;
116 #size-cells = <0>;
118 #power-domain-cells = <0>;
123 #power-domain-cells = <0>;
138 #size-cells = <0>;
140 reg = <0x40000000 0x400>;
159 #size-cells = <0>;
161 reg = <0x40001000 0x400>;
180 #size-cells = <0>;
182 reg = <0x40002000 0x400>;
201 #size-cells = <0>;
203 reg = <0x40003000 0x400>;
222 #size-cells = <0>;
224 reg = <0x40004000 0x400>;
238 #size-cells = <0>;
240 reg = <0x40005000 0x400>;
254 #size-cells = <0>;
256 reg = <0x40006000 0x400>;
275 #size-cells = <0>;
277 reg = <0x40007000 0x400>;
296 #size-cells = <0>;
298 reg = <0x40008000 0x400>;
317 #size-cells = <0>;
319 reg = <0x40009000 0x400>;
330 trigger@0 {
332 reg = <0>;
344 reg = <0x4000e000 0x400>;
352 reg = <0x4000f000 0x400>;
360 reg = <0x40010000 0x400>;
368 reg = <0x40011000 0x400>;
376 reg = <0x40012000 0x400>;
383 #size-cells = <0>;
389 reg = <0x40013000 0x400>;
396 #size-cells = <0>;
402 reg = <0x40014000 0x400>;
409 #size-cells = <0>;
415 reg = <0x40015000 0x400>;
422 #size-cells = <0>;
428 reg = <0x40016000 0x400>;
437 reg = <0x40017000 0x400>;
441 #size-cells = <0>;
461 reg = <0x40018000 0x400>;
469 reg = <0x40019000 0x400>;
477 #size-cells = <0>;
479 reg = <0x44000000 0x400>;
489 timer@0 {
491 reg = <0>;
498 #size-cells = <0>;
500 reg = <0x44001000 0x400>;
519 reg = <0x44003000 0x400>;
527 #size-cells = <0>;
529 reg = <0x44006000 0x400>;
548 #size-cells = <0>;
550 reg = <0x44007000 0x400>;
568 #size-cells = <0>;
570 reg = <0x44008000 0x400>;
589 reg = <0x48000000 0x400>;
606 reg = <0x48001000 0x400>;
623 reg = <0x48002000 0x1c>;
633 reg = <0x48003000 0x400>;
641 #size-cells = <0>;
644 adc1: adc@0 {
647 reg = <0x0>;
649 interrupts = <0>;
656 reg = <0x100>;
665 reg = <0x48004000 0x400>, <0x48005000 0x400>;
679 reg = <0x49000000 0x10000>;
696 reg = <0x4c000000 0x400>;
704 reg = <0x50000000 0x1000>;
712 offset = <0x404>;
713 mask = <0x1>;
718 reg = <0x50001000 0x400>;
727 st,tzcr = <&rcc 0x0 0x1>;
753 reg = <0x5000d000 0x400>;
758 reg = <0x50020000 0x400>;
763 #size-cells = <0>;
765 reg = <0x50021000 0x400>;
790 #size-cells = <0>;
792 reg = <0x50022000 0x400>;
812 reg = <0x50023000 0x400>;
826 reg = <0x50024000 0x400>;
840 reg = <0x50025000 0x8>;
849 reg = <0x54001000 0x400>;
858 reg = <0x54003000 0x400>;
866 reg = <0x58000000 0x1000>;
876 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
886 reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
899 reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
913 reg = <0x58009000 0x400>;
920 reg = <0x5800c000 0x1000>;
929 reg = <0x5800d000 0x1000>;
939 reg = <0x5a000000 0x800>;
949 reg = <0x5a001000 0x400>;
960 #size-cells = <0>;
962 reg = <0x5a006000 0x1000>;
967 usbphyc_port0: usb-phy@0 {
968 #phy-cells = <0>;
969 reg = <0>;
980 reg = <0x5c000000 0x400>;
988 reg = <0x5c002000 0x400>;
995 #size-cells = <0>;
1001 reg = <0x5c009000 0x400>;
1008 #size-cells = <0>;