Lines Matching +full:stm32 +full:- +full:ltdc
2 * Copyright (C) 2015, STMicroelectronics - All Rights Reserved
3 * Author(s): Maxime Coquelin <mcoquelin.stm32@gmail.com> for STMicroelectronics.
5 * This file is dual-licensed: you can use it either under the terms
45 #include "armv7-m.dtsi"
46 #include <dt-bindings/clock/stm32fx-clock.h>
47 #include <dt-bindings/mfd/stm32f4-rcc.h>
51 clk_hse: clk-hse {
52 #clock-cells = <0>;
53 compatible = "fixed-clock";
54 clock-frequency = <0>;
57 clk_lse: clk-lse {
58 #clock-cells = <0>;
59 compatible = "fixed-clock";
60 clock-frequency = <32768>;
63 clk_lsi: clk-lsi {
64 #clock-cells = <0>;
65 compatible = "fixed-clock";
66 clock-frequency = <32000>;
69 clk_i2s_ckin: i2s-ckin {
70 #clock-cells = <0>;
71 compatible = "fixed-clock";
72 clock-frequency = <0>;
78 compatible = "st,stm32-timer";
86 #address-cells = <1>;
87 #size-cells = <0>;
88 compatible = "st,stm32-timers";
91 clock-names = "int";
95 compatible = "st,stm32-pwm";
100 compatible = "st,stm32-timer-trigger";
107 compatible = "st,stm32-timer";
115 #address-cells = <1>;
116 #size-cells = <0>;
117 compatible = "st,stm32-timers";
120 clock-names = "int";
124 compatible = "st,stm32-pwm";
129 compatible = "st,stm32-timer-trigger";
136 compatible = "st,stm32-timer";
144 #address-cells = <1>;
145 #size-cells = <0>;
146 compatible = "st,stm32-timers";
149 clock-names = "int";
153 compatible = "st,stm32-pwm";
158 compatible = "st,stm32-timer-trigger";
165 compatible = "st,stm32-timer";
172 #address-cells = <1>;
173 #size-cells = <0>;
174 compatible = "st,stm32-timers";
177 clock-names = "int";
181 compatible = "st,stm32-pwm";
186 compatible = "st,stm32-timer-trigger";
193 compatible = "st,stm32-timer";
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "st,stm32-timers";
206 clock-names = "int";
210 compatible = "st,stm32-timer-trigger";
217 compatible = "st,stm32-timer";
225 #address-cells = <1>;
226 #size-cells = <0>;
227 compatible = "st,stm32-timers";
230 clock-names = "int";
234 compatible = "st,stm32-timer-trigger";
241 #address-cells = <1>;
242 #size-cells = <0>;
243 compatible = "st,stm32-timers";
246 clock-names = "int";
250 compatible = "st,stm32-pwm";
255 compatible = "st,stm32-timer-trigger";
262 #size-cells = <0>;
263 compatible = "st,stm32-timers";
266 clock-names = "int";
270 compatible = "st,stm32-pwm";
276 #size-cells = <0>;
277 compatible = "st,stm32-timers";
280 clock-names = "int";
284 compatible = "st,stm32-pwm";
290 compatible = "st,stm32-rtc";
293 clock-names = "ck_rtc";
294 assigned-clocks = <&rcc 1 CLK_RTC>;
295 assigned-clock-parents = <&rcc 1 CLK_LSE>;
296 interrupt-parent = <&exti>;
298 interrupt-names = "alarm";
304 compatible = "st,stm32-iwdg";
311 compatible = "st,stm32-uart";
319 compatible = "st,stm32-uart";
326 dma-names = "rx", "tx";
330 compatible = "st,stm32-uart";
338 compatible = "st,stm32-uart";
346 compatible = "st,stm32f4-i2c";
352 #address-cells = <1>;
353 #size-cells = <0>;
358 compatible = "st,stm32f4-dac-core";
362 clock-names = "pclk";
363 #address-cells = <1>;
364 #size-cells = <0>;
368 compatible = "st,stm32-dac";
369 #io-channels-cells = <1>;
375 compatible = "st,stm32-dac";
376 #io-channels-cells = <1>;
383 compatible = "st,stm32-uart";
391 compatible = "st,stm32-uart";
399 #address-cells = <1>;
400 #size-cells = <0>;
401 compatible = "st,stm32-timers";
404 clock-names = "int";
408 compatible = "st,stm32-pwm";
413 compatible = "st,stm32-timer-trigger";
420 #address-cells = <1>;
421 #size-cells = <0>;
422 compatible = "st,stm32-timers";
425 clock-names = "int";
429 compatible = "st,stm32-pwm";
434 compatible = "st,stm32-timer-trigger";
441 compatible = "st,stm32-uart";
448 dma-names = "rx", "tx";
452 compatible = "st,stm32-uart";
460 compatible = "st,stm32f4-adc-core";
464 clock-names = "adc";
465 interrupt-controller;
466 #interrupt-cells = <1>;
467 #address-cells = <1>;
468 #size-cells = <0>;
472 compatible = "st,stm32f4-adc";
473 #io-channel-cells = <1>;
476 interrupt-parent = <&adc>;
479 dma-names = "rx";
484 compatible = "st,stm32f4-adc";
485 #io-channel-cells = <1>;
488 interrupt-parent = <&adc>;
491 dma-names = "rx";
496 compatible = "st,stm32f4-adc";
497 #io-channel-cells = <1>;
500 interrupt-parent = <&adc>;
503 dma-names = "rx";
508 syscfg: system-config@40013800 {
513 exti: interrupt-controller@40013c00 {
514 compatible = "st,stm32-exti";
515 interrupt-controller;
516 #interrupt-cells = <2>;
522 #address-cells = <1>;
523 #size-cells = <0>;
524 compatible = "st,stm32-timers";
527 clock-names = "int";
531 compatible = "st,stm32-pwm";
536 compatible = "st,stm32-timer-trigger";
543 #size-cells = <0>;
544 compatible = "st,stm32-timers";
547 clock-names = "int";
551 compatible = "st,stm32-pwm";
557 #size-cells = <0>;
558 compatible = "st,stm32-timers";
561 clock-names = "int";
565 compatible = "st,stm32-pwm";
570 pwrcfg: power-config@40007000 {
576 compatible = "st,stm32f4xx-sdio";
581 pinctrl-0 = <&sdio_pins>;
582 pinctrl-1 = <&sdio_pins_od>;
583 pinctrl-names = "default", "opendrain";
584 max-frequency = <48000000>;
587 ltdc: display-controller@40016800 { label
588 compatible = "st,stm32-ltdc";
591 resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
593 clock-names = "lcd";
598 compatible = "st,stm32f4-crc";
605 #reset-cells = <1>;
606 #clock-cells = <2>;
607 compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
611 assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
612 assigned-clock-rates = <1000000>;
615 dma1: dma-controller@40026000 {
616 compatible = "st,stm32-dma";
627 #dma-cells = <4>;
630 dma2: dma-controller@40026400 {
631 compatible = "st,stm32-dma";
642 #dma-cells = <4>;
647 compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
649 reg-names = "stmmaceth";
651 interrupt-names = "macirq";
652 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
658 snps,mixed-burst;
667 clock-names = "otg";
672 compatible = "st,stm32f4x9-fsotg";
676 clock-names = "otg";
681 compatible = "st,stm32-dcmi";
686 clock-names = "mclk";
687 pinctrl-names = "default";
688 pinctrl-0 = <&dcmi_pins>;
690 dma-names = "tx";
695 compatible = "st,stm32-rng";