Lines Matching +full:stih +full:- +full:cec
9 #include "stih407-pinctrl.dtsi"
10 #include <dt-bindings/mfd/st-lpc.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/stih407-resets.h>
13 #include <dt-bindings/interrupt-controller/irq-st.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
24 compatible = "shared-dma-pool";
26 no-map;
31 #address-cells = <1>;
32 #size-cells = <0>;
35 compatible = "arm,cortex-a9";
38 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
39 cpu-release-addr = <0x94100A4>;
42 operating-points = <1500000 0
48 clock-names = "cpu";
49 clock-latency = <100000>;
54 compatible = "arm,cortex-a9";
57 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
58 cpu-release-addr = <0x94100A4>;
61 operating-points = <1500000 0
68 intc: interrupt-controller@08761000 {
69 compatible = "arm,cortex-a9-gic";
70 #interrupt-cells = <3>;
71 interrupt-controller;
76 compatible = "arm,cortex-a9-scu";
81 interrupt-parent = <&intc>;
82 compatible = "arm,cortex-a9-global-timer";
88 l2: cache-controller {
89 compatible = "arm,pl310-cache";
91 arm,data-latency = <3 3 3>;
92 arm,tag-latency = <2 2 2>;
93 cache-unified;
94 cache-level = <2>;
97 arm-pmu {
98 interrupt-parent = <&intc>;
99 compatible = "arm,cortex-a9-pmu";
103 pwm_regulator: pwm-regulator {
104 compatible = "pwm-regulator";
106 regulator-name = "CPU_1V0_AVS";
107 regulator-min-microvolt = <784000>;
108 regulator-max-microvolt = <1299000>;
109 regulator-always-on;
110 max-duty-cycle = <255>;
115 #address-cells = <1>;
116 #size-cells = <1>;
117 interrupt-parent = <&intc>;
119 compatible = "simple-bus";
122 compatible = "st,stih407-restart";
127 powerdown: powerdown-controller {
128 compatible = "st,stih407-powerdown";
129 #reset-cells = <1>;
132 softreset: softreset-controller {
133 compatible = "st,stih407-softreset";
134 #reset-cells = <1>;
137 picophyreset: picophyreset-controller {
138 compatible = "st,stih407-picophyreset";
139 #reset-cells = <1>;
142 syscfg_sbc: sbc-syscfg@9620000 {
143 compatible = "st,stih407-sbc-syscfg", "syscon";
147 syscfg_front: front-syscfg@9280000 {
148 compatible = "st,stih407-front-syscfg", "syscon";
152 syscfg_rear: rear-syscfg@9290000 {
153 compatible = "st,stih407-rear-syscfg", "syscon";
157 syscfg_flash: flash-syscfg@92a0000 {
158 compatible = "st,stih407-flash-syscfg", "syscon";
162 syscfg_sbc_reg: fvdp-lite-syscfg@9600000 {
163 compatible = "st,stih407-sbc-reg-syscfg", "syscon";
167 syscfg_core: core-syscfg@92b0000 {
168 compatible = "st,stih407-core-syscfg", "syscon";
172 syscfg_lpm: lpm-syscfg@94b5100 {
173 compatible = "st,stih407-lpm-syscfg", "syscon";
177 irq-syscfg {
178 compatible = "st,stih407-irq-syscfg";
180 st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
182 st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
187 vtg_main: sti-vtg-main@8d02800 {
193 vtg_aux: sti-vtg-aux@8d00200 {
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_serial0>;
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_serial1>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_serial2>;
232 /* SBC_ASC0 - UART10 */
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_sbc_serial0>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&pinctrl_sbc_serial1>;
256 compatible = "st,comms-ssc4-i2c";
260 clock-names = "ssc";
261 clock-frequency = <400000>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_i2c0_default>;
264 #address-cells = <1>;
265 #size-cells = <0>;
271 compatible = "st,comms-ssc4-i2c";
275 clock-names = "ssc";
276 clock-frequency = <400000>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_i2c1_default>;
279 #address-cells = <1>;
280 #size-cells = <0>;
286 compatible = "st,comms-ssc4-i2c";
290 clock-names = "ssc";
291 clock-frequency = <400000>;
292 pinctrl-names = "default";
293 pinctrl-0 = <&pinctrl_i2c2_default>;
294 #address-cells = <1>;
295 #size-cells = <0>;
301 compatible = "st,comms-ssc4-i2c";
305 clock-names = "ssc";
306 clock-frequency = <400000>;
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_i2c3_default>;
309 #address-cells = <1>;
310 #size-cells = <0>;
316 compatible = "st,comms-ssc4-i2c";
320 clock-names = "ssc";
321 clock-frequency = <400000>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_i2c4_default>;
324 #address-cells = <1>;
325 #size-cells = <0>;
331 compatible = "st,comms-ssc4-i2c";
335 clock-names = "ssc";
336 clock-frequency = <400000>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&pinctrl_i2c5_default>;
339 #address-cells = <1>;
340 #size-cells = <0>;
348 compatible = "st,comms-ssc4-i2c";
352 clock-names = "ssc";
353 clock-frequency = <400000>;
354 pinctrl-names = "default";
355 pinctrl-0 = <&pinctrl_i2c10_default>;
356 #address-cells = <1>;
357 #size-cells = <0>;
363 compatible = "st,comms-ssc4-i2c";
367 clock-names = "ssc";
368 clock-frequency = <400000>;
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_i2c11_default>;
371 #address-cells = <1>;
372 #size-cells = <0>;
378 compatible = "st,stih407-usb2-phy";
379 #phy-cells = <0>;
383 reset-names = "global", "port";
387 compatible = "st,miphy28lp-phy";
389 #address-cells = <1>;
390 #size-cells = <1>;
397 reg-names = "sata-up",
398 "pcie-up",
402 #phy-cells = <1>;
404 reset-names = "miphy-sw-rst";
412 reg-names = "sata-up",
413 "pcie-up",
418 #phy-cells = <1>;
420 reset-names = "miphy-sw-rst";
427 reg-names = "pipew",
428 "usb3-up";
432 #phy-cells = <1>;
434 reset-names = "miphy-sw-rst";
440 compatible = "st,comms-ssc4-spi";
444 clock-names = "ssc";
445 pinctrl-0 = <&pinctrl_spi0_default>;
446 pinctrl-names = "default";
447 #address-cells = <1>;
448 #size-cells = <0>;
454 compatible = "st,comms-ssc4-spi";
458 clock-names = "ssc";
459 pinctrl-names = "default";
460 pinctrl-0 = <&pinctrl_spi1_default>;
466 compatible = "st,comms-ssc4-spi";
470 clock-names = "ssc";
471 pinctrl-names = "default";
472 pinctrl-0 = <&pinctrl_spi2_default>;
478 compatible = "st,comms-ssc4-spi";
482 clock-names = "ssc";
483 pinctrl-names = "default";
484 pinctrl-0 = <&pinctrl_spi3_default>;
490 compatible = "st,comms-ssc4-spi";
494 clock-names = "ssc";
495 pinctrl-names = "default";
496 pinctrl-0 = <&pinctrl_spi4_default>;
503 compatible = "st,comms-ssc4-spi";
507 clock-names = "ssc";
508 pinctrl-names = "default";
509 pinctrl-0 = <&pinctrl_spi10_default>;
515 compatible = "st,comms-ssc4-spi";
519 clock-names = "ssc";
520 pinctrl-names = "default";
521 pinctrl-0 = <&pinctrl_spi11_default>;
527 compatible = "st,comms-ssc4-spi";
531 clock-names = "ssc";
532 pinctrl-names = "default";
533 pinctrl-0 = <&pinctrl_spi12_default>;
539 compatible = "st,sdhci-stih407", "st,sdhci";
542 reg-names = "mmc", "top-mmc-delay";
544 interrupt-names = "mmcirq";
545 pinctrl-names = "default";
546 pinctrl-0 = <&pinctrl_mmc0>;
547 clock-names = "mmc", "icn";
550 bus-width = <8>;
554 compatible = "st,sdhci-stih407", "st,sdhci";
557 reg-names = "mmc";
559 interrupt-names = "mmcirq";
560 pinctrl-names = "default";
561 pinctrl-0 = <&pinctrl_sd1>;
562 clock-names = "mmc", "icn";
566 reset-names = "softreset";
567 bus-width = <4>;
570 /* Watchdog and Real-Time Clock */
572 compatible = "st,stih407-lpc";
576 timeout-sec = <120>;
578 st,lpc-mode = <ST_LPC_MODE_WDT>;
582 compatible = "st,stih407-lpc";
586 st,lpc-mode = <ST_LPC_MODE_CLKSRC>;
594 interrupt-names = "hostc";
597 phy-names = "ahci_phy";
602 reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
604 clock-names = "ahci_clk";
607 ports-implemented = <0x1>;
617 interrupt-names = "hostc";
620 phy-names = "ahci_phy";
625 reset-names = "pwr-dwn",
626 "sw-rst",
627 "pwr-rst";
629 clock-names = "ahci_clk";
632 ports-implemented = <0x1>;
639 compatible = "st,stih407-dwc3";
641 reg-names = "reg-glue", "syscfg-reg";
645 reset-names = "powerdown", "softreset";
646 #address-cells = <1>;
647 #size-cells = <1>;
648 pinctrl-names = "default";
649 pinctrl-0 = <&pinctrl_usb3>;
659 phy-names = "usb2-phy", "usb3-phy";
667 compatible = "st,sti-pwm";
668 #pwm-cells = <2>;
671 pinctrl-names = "default";
672 pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
673 clock-names = "pwm";
675 st,pwm-num-chan = <1>;
682 compatible = "st,sti-pwm";
683 #pwm-cells = <2>;
685 pinctrl-names = "default";
686 pinctrl-0 = <&pinctrl_pwm1_chan0_default
690 clock-names = "pwm";
692 st,pwm-num-chan = <4>;
714 compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
716 reg-names = "stmmaceth", "sti-ethconf";
721 reset-names = "stmmaceth";
725 interrupt-names = "macirq", "eth_wake_irq";
730 pinctrl-names = "default";
731 pinctrl-0 = <&pinctrl_rgmii1>;
733 clock-names = "stmmaceth", "sti-ethclk";
738 cec: sti-cec@094a087c { label
739 compatible = "st,stih-cec";
742 clock-names = "cec-clk";
744 interrupt-names = "cec-irq";
745 pinctrl-names = "default";
746 pinctrl-0 = <&pinctrl_cec0_default>;
765 compatible = "st,stih407-mailbox";
768 #mbox-cells = <2>;
769 mbox-name = "a9";
774 compatible = "st,stih407-mailbox";
776 #mbox-cells = <2>;
777 mbox-name = "st231_gp_1";
782 compatible = "st,stih407-mailbox";
784 #mbox-cells = <2>;
785 mbox-name = "st231_gp_0";
790 compatible = "st,stih407-mailbox";
792 #mbox-cells = <2>;
793 mbox-name = "st231_audio_video";
797 st231_delta: st231-delta@44000000 {
798 compatible = "st,st231-rproc";
799 memory-region = <&dmu_reserved>;
801 reset-names = "sw_reset";
803 clock-frequency = <600000000>;
805 #mbox-cells = <1>;
806 mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
811 fdma0: dma-controller@8e20000 {
812 compatible = "st,stih407-fdma-mpe31-11", "st,slim-rproc";
817 reg-names = "slimcore", "dmem", "peripherals", "imem";
823 dma-channels = <16>;
824 #dma-cells = <3>;
828 fdma1: dma-controller@8e40000 {
829 compatible = "st,stih407-fdma-mpe31-12", "st,slim-rproc";
834 reg-names = "slimcore", "dmem", "peripherals", "imem";
841 dma-channels = <16>;
842 #dma-cells = <3>;
846 fdma2: dma-controller@8e60000 {
847 compatible = "st,stih407-fdma-mpe31-13", "st,slim-rproc";
852 reg-names = "slimcore", "dmem", "peripherals", "imem";
854 dma-channels = <16>;
855 #dma-cells = <3>;
862 sti_sasg_codec: sti-sasg-codec {
863 compatible = "st,stih407-sas-codec";
864 #sound-dai-cells = <1>;
869 sti_uni_player0: sti-uni-player@8d80000 {
870 compatible = "st,stih407-uni-player-hdmi";
871 #sound-dai-cells = <0>;
874 assigned-clocks = <&clk_s_d0_quadfs 0>, <&clk_s_d0_flexgen CLK_PCM_0>;
875 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 0>;
876 assigned-clock-rates = <50000000>;
880 dma-names = "tx";
885 sti_uni_player1: sti-uni-player@8d81000 {
886 compatible = "st,stih407-uni-player-pcm-out";
887 #sound-dai-cells = <0>;
890 assigned-clocks = <&clk_s_d0_quadfs 1>, <&clk_s_d0_flexgen CLK_PCM_1>;
891 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 1>;
892 assigned-clock-rates = <50000000>;
896 dma-names = "tx";
901 sti_uni_player2: sti-uni-player@8d82000 {
902 compatible = "st,stih407-uni-player-dac";
903 #sound-dai-cells = <0>;
906 assigned-clocks = <&clk_s_d0_quadfs 2>, <&clk_s_d0_flexgen CLK_PCM_2>;
907 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 2>;
908 assigned-clock-rates = <50000000>;
912 dma-names = "tx";
917 sti_uni_player3: sti-uni-player@8d85000 {
918 compatible = "st,stih407-uni-player-spdif";
919 #sound-dai-cells = <0>;
922 assigned-clocks = <&clk_s_d0_quadfs 3>, <&clk_s_d0_flexgen CLK_SPDIFF>;
923 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 3>;
924 assigned-clock-rates = <50000000>;
928 dma-names = "tx";
933 sti_uni_reader0: sti-uni-reader@8d83000 {
934 compatible = "st,stih407-uni-reader-pcm_in";
935 #sound-dai-cells = <0>;
940 dma-names = "rx";
945 sti_uni_reader1: sti-uni-reader@8d84000 {
946 compatible = "st,stih407-uni-reader-hdmi";
947 #sound-dai-cells = <0>;
952 dma-names = "rx";
958 compatible = "st,comms-irb";
961 rx-mode = "infrared";
962 pinctrl-names = "default";
963 pinctrl-0 = <&pinctrl_ir
974 compatible = "st,stih407-socinfo";