Lines Matching +full:0 +full:x94a087c
25 reg = <0x44000000 0x01000000>;
32 #size-cells = <0>;
33 cpu@0 {
36 reg = <0>;
38 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
39 cpu-release-addr = <0x94100A4>;
42 operating-points = <1500000 0
43 1200000 0
44 800000 0
45 500000 0>;
50 st,syscfg = <&syscfg_core 0x8e0>;
57 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
58 cpu-release-addr = <0x94100A4>;
61 operating-points = <1500000 0
62 1200000 0
63 800000 0
64 500000 0>;
72 reg = <0x08761000 0x1000>, <0x08760100 0x100>;
77 reg = <0x08760000 0x1000>;
83 reg = <0x08760200 0x100>;
90 reg = <0x08762000 0x1000>;
144 reg = <0x9620000 0x1000>;
149 reg = <0x9280000 0x1000>;
154 reg = <0x9290000 0x1000>;
159 reg = <0x92a0000 0x1000>;
164 reg = <0x9600000 0x1000>;
169 reg = <0x92b0000 0x1000>;
174 reg = <0x94b5100 0x1000>;
189 reg = <0x8d02800 0x200>;
195 reg = <0x8d00200 0x100>;
201 reg = <0x9830000 0x2c>;
204 pinctrl-0 = <&pinctrl_serial0>;
212 reg = <0x9831000 0x2c>;
215 pinctrl-0 = <&pinctrl_serial1>;
223 reg = <0x9832000 0x2c>;
226 pinctrl-0 = <&pinctrl_serial2>;
235 reg = <0x9530000 0x2c>;
238 pinctrl-0 = <&pinctrl_sbc_serial0>;
246 reg = <0x9531000 0x2c>;
249 pinctrl-0 = <&pinctrl_sbc_serial1>;
258 reg = <0x9840000 0x110>;
263 pinctrl-0 = <&pinctrl_i2c0_default>;
265 #size-cells = <0>;
272 reg = <0x9841000 0x110>;
278 pinctrl-0 = <&pinctrl_i2c1_default>;
280 #size-cells = <0>;
287 reg = <0x9842000 0x110>;
293 pinctrl-0 = <&pinctrl_i2c2_default>;
295 #size-cells = <0>;
302 reg = <0x9843000 0x110>;
308 pinctrl-0 = <&pinctrl_i2c3_default>;
310 #size-cells = <0>;
317 reg = <0x9844000 0x110>;
323 pinctrl-0 = <&pinctrl_i2c4_default>;
325 #size-cells = <0>;
332 reg = <0x9845000 0x110>;
338 pinctrl-0 = <&pinctrl_i2c5_default>;
340 #size-cells = <0>;
349 reg = <0x9540000 0x110>;
355 pinctrl-0 = <&pinctrl_i2c10_default>;
357 #size-cells = <0>;
364 reg = <0x9541000 0x110>;
370 pinctrl-0 = <&pinctrl_i2c11_default>;
372 #size-cells = <0>;
379 #phy-cells = <0>;
380 st,syscfg = <&syscfg_core 0x100 0xf4>;
394 reg = <0x9b22000 0xff>,
395 <0x9b09000 0xff>,
396 <0x9b04000 0xff>;
401 st,syscfg = <0x114 0x818 0xe0 0xec>;
409 reg = <0x9b2a000 0xff>,
410 <0x9b19000 0xff>,
411 <0x9b14000 0xff>;
416 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
425 reg = <0x8f95000 0xff>,
426 <0x8f90000 0xff>;
430 st,syscfg = <0x11c 0x820>;
441 reg = <0x9840000 0x110>;
445 pinctrl-0 = <&pinctrl_spi0_default>;
448 #size-cells = <0>;
455 reg = <0x9841000 0x110>;
460 pinctrl-0 = <&pinctrl_spi1_default>;
467 reg = <0x9842000 0x110>;
472 pinctrl-0 = <&pinctrl_spi2_default>;
479 reg = <0x9843000 0x110>;
484 pinctrl-0 = <&pinctrl_spi3_default>;
491 reg = <0x9844000 0x110>;
496 pinctrl-0 = <&pinctrl_spi4_default>;
504 reg = <0x9540000 0x110>;
509 pinctrl-0 = <&pinctrl_spi10_default>;
516 reg = <0x9541000 0x110>;
521 pinctrl-0 = <&pinctrl_spi11_default>;
528 reg = <0x9542000 0x110>;
533 pinctrl-0 = <&pinctrl_spi12_default>;
541 reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
546 pinctrl-0 = <&pinctrl_mmc0>;
556 reg = <0x09080000 0x7ff>;
561 pinctrl-0 = <&pinctrl_sd1>;
573 reg = <0x8787000 0x1000>;
583 reg = <0x8788000 0x1000>;
591 reg = <0x9b20000 0x1000>;
607 ports-implemented = <0x1>;
614 reg = <0x9b28000 0x1000>;
632 ports-implemented = <0x1>;
640 reg = <0x08f94000 0x1000>, <0x110 0x4>;
649 pinctrl-0 = <&pinctrl_usb3>;
656 reg = <0x09900000 0x100000>;
669 reg = <0x9810000 0x68>;
672 pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
684 reg = <0x9510000 0x68>;
686 pinctrl-0 = <&pinctrl_pwm1_chan0_default
699 reg = <0x08a89000 0x1000>;
706 reg = <0x08a8a000 0x1000>;
715 reg = <0x9630000 0x8000>, <0x80 0x4>;
718 st,syscon = <&syscfg_sbc_reg 0x80>;
731 pinctrl-0 = <&pinctrl_rgmii1>;
740 reg = <0x94a087c 0x64>;
746 pinctrl-0 = <&pinctrl_cec0_default>;
752 reg = <0x08a89000 0x1000>;
759 reg = <0x08a8a000 0x1000>;
766 reg = <0x8f00000 0x1000>;
775 reg = <0x8f01000 0x1000>;
783 reg = <0x8f02000 0x1000>;
791 reg = <0x8f03000 0x1000>;
804 st,syscfg = <&syscfg_core 0x224>;
807 mboxes = <&mailbox0 0 0>, <&mailbox3 0 1>, <&mailbox0 0 1>, <&mailbox3 0 0>;
813 reg = <0x8e20000 0x8000>,
814 <0x8e30000 0x3000>,
815 <0x8e37000 0x1000>,
816 <0x8e38000 0x8000>;
830 reg = <0x8e40000 0x8000>,
831 <0x8e50000 0x3000>,
832 <0x8e57000 0x1000>,
833 <0x8e58000 0x8000>;
848 reg = <0x8e60000 0x8000>,
849 <0x8e70000 0x3000>,
850 <0x8e77000 0x1000>,
851 <0x8e78000 0x8000>;
871 #sound-dai-cells = <0>;
874 assigned-clocks = <&clk_s_d0_quadfs 0>, <&clk_s_d0_flexgen CLK_PCM_0>;
875 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 0>;
877 reg = <0x8d80000 0x158>;
879 dmas = <&fdma0 2 0 1>;
887 #sound-dai-cells = <0>;
891 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 1>;
893 reg = <0x8d81000 0x158>;
895 dmas = <&fdma0 3 0 1>;
903 #sound-dai-cells = <0>;
907 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 2>;
909 reg = <0x8d82000 0x158>;
911 dmas = <&fdma0 4 0 1>;
919 #sound-dai-cells = <0>;
923 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 3>;
925 reg = <0x8d85000 0x158>;
927 dmas = <&fdma0 7 0 1>;
935 #sound-dai-cells = <0>;
937 reg = <0x8d83000 0x158>;
939 dmas = <&fdma0 5 0 1>;
947 #sound-dai-cells = <0>;
949 reg = <0x8d84000 0x158>;
951 dmas = <&fdma0 6 0 1>;
959 reg = <0x09518000 0x234>;
963 pinctrl-0 = <&pinctrl_ir