arm/dts/socfpga_stratix10.dtsi

1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
11 	compatible = "altr,socfpga-stratix10";
12 	#address-cells = <2>;
13 	#size-cells = <2>;
16 		#address-cells = <1>;
17 		#size-cells = <0>;
20 			compatible = "arm,cortex-a53", "arm,armv8";
22 			enable-method = "psci";
27 			compatible = "arm,cortex-a53", "arm,armv8";
29 			enable-method = "psci";
34 			compatible = "arm,cortex-a53", "arm,armv8";
36 			enable-method = "psci";
41 			compatible = "arm,cortex-a53", "arm,armv8";
43 			enable-method = "psci";
49 		compatible = "arm,armv8-pmuv3";
54 		interrupt-affinity = <&cpu0>,
58 		interrupt-parent = <&intc>;
62 		compatible = "arm,psci-0.2";
67 		compatible = "arm,gic-400", "arm,cortex-a15-gic";
68 		#interrupt-cells = <3>;
69 		interrupt-controller;
77 		#address-cells = <1>;
78 		#size-cells = <1>;
79 		compatible = "simple-bus";
81 		interrupt-parent = <&intc>;
83 		u-boot,dm-pre-reloc;
86 			compatible = "altr,clk-mgr";
91 			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
94 			interrupt-names = "macirq";
95 			mac-address = [00 00 00 00 00 00];
97 			reset-names = "stmmaceth";
98 			altr,sysmgr-syscon = <&sysmgr 0x44 0>;
103 			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
106 			interrupt-names = "macirq";
107 			mac-address = [00 00 00 00 00 00];
109 			reset-names = "stmmaceth";
110 			altr,sysmgr-syscon = <&sysmgr 0x48 0>;
115 			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
118 			interrupt-names = "macirq";
119 			mac-address = [00 00 00 00 00 00];
121 			reset-names = "stmmaceth";
122 			altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
127 			#address-cells = <1>;
128 			#size-cells = <0>;
129 			compatible = "snps,dw-apb-gpio";
134 			porta: gpio-controller@0 {
135 				compatible = "snps,dw-apb-gpio-port";
136 				gpio-controller;
137 				#gpio-cells = <2>;
138 				snps,nr-gpios = <24>;
140 				interrupt-controller;
141 				#interrupt-cells = <2>;
143 				bank-name = "porta";
148 			#address-cells = <1>;
149 			#size-cells = <0>;
150 			compatible = "snps,dw-apb-gpio";
155 			portb: gpio-controller@0 {
156 				compatible = "snps,dw-apb-gpio-port";
157 				gpio-controller;
158 				#gpio-cells = <2>;
159 				snps,nr-gpios = <24>;
161 				interrupt-controller;
162 				#interrupt-cells = <2>;
164 				bank-name = "portb";
169 			#address-cells = <1>;
170 			#size-cells = <0>;
171 			compatible = "snps,designware-i2c";
175 			reset-names = "i2c";
180 			#address-cells = <1>;
181 			#size-cells = <0>;
182 			compatible = "snps,designware-i2c";
186 			reset-names = "i2c";
191 			#address-cells = <1>;
192 			#size-cells = <0>;
193 			compatible = "snps,designware-i2c";
197 			reset-names = "i2c";
202 			#address-cells = <1>;
203 			#size-cells = <0>;
204 			compatible = "snps,designware-i2c";
208 			reset-names = "i2c";
213 			#address-cells = <1>;
214 			#size-cells = <0>;
215 			compatible = "snps,designware-i2c";
219 			reset-names = "i2c";
224 			#address-cells = <1>;
225 			#size-cells = <0>;
226 			compatible = "altr,socfpga-dw-mshc";
229 			fifo-depth = <0x400>;
231 			u-boot,dm-pre-reloc;
236 			compatible = "mmio-sram";
241 			#reset-cells = <1>;
242 			compatible = "altr,rst-mgr";
244 			altr,modrst-offset = <0x20>;
245 			u-boot,dm-pre-reloc;
249 			compatible = "snps,dw-apb-ssi";
250 			#address-cells = <1>;
251 			#size-cells = <0>;
255 			reg-io-width = <4>;
256 			num-chipselect = <4>;
257 			bus-num = <0>;
262 			compatible = "snps,dw-apb-ssi";
263 			#address-cells = <1>;
264 			#size-cells = <0>;
268 			reg-io-width = <4>;
269 			num-chipselect = <4>;
270 			bus-num = <0>;
275 			compatible = "altr,sys-mgr", "syscon";
281 			compatible = "arm,armv8-timer";
289 			compatible = "snps,dw-apb-timer";
295 			compatible = "snps,dw-apb-timer";
301 			compatible = "snps,dw-apb-timer";
307 			compatible = "snps,dw-apb-timer";
313 			compatible = "snps,dw-apb-uart";
316 			reg-shift = <2>;
317 			reg-io-width = <4>;
319 			clock-frequency = <100000000>;
320 			u-boot,dm-pre-reloc;
325 			compatible = "snps,dw-apb-uart";
328 			reg-shift = <2>;
329 			reg-io-width = <4>;
335 			#phy-cells = <0>;
336 			compatible = "usb-nop-xceiv";
345 			phy-names = "usb2-phy";
347 			reset-names = "dwc2", "dwc2-ecc";
356 			phy-names = "usb2-phy";
358 			reset-names = "dwc2", "dwc2-ecc";
363 			compatible = "snps,dw-wdt";
367 			u-boot,dm-pre-reloc;
372 			compatible = "snps,dw-wdt";
380 			compatible = "snps,dw-wdt";
388 			compatible = "snps,dw-wdt";