Lines Matching +full:0 +full:xf8048010
17 #clock-cells = <0>;
18 clock-frequency = <0>;
23 #clock-cells = <0>;
24 clock-frequency = <0>;
36 reg = <0x00400000 0x100000>;
44 reg = <0x00500000 0x100000>;
52 reg = <0xa0000000 0x300>;
60 reg = <0xb0000000 0x300>;
74 reg = <0xf0000000 0x2000>;
81 reg = <0xf0014000 0x160>;
83 #size-cells = <0>;
89 #clock-cells = <0>;
93 plla: pllack@0 {
95 #clock-cells = <0>;
97 reg = <0>;
100 atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
106 #clock-cells = <0>;
112 #clock-cells = <0>;
118 #clock-cells = <0>;
124 #clock-cells = <0>;
130 #clock-cells = <0>;
138 #clock-cells = <0>;
146 #clock-cells = <0>;
154 #clock-cells = <0>;
161 #size-cells = <0>;
165 prog0: prog@0 {
166 #clock-cells = <0>;
167 reg = <0>;
171 #clock-cells = <0>;
176 #clock-cells = <0>;
184 #size-cells = <0>;
187 #clock-cells = <0>;
193 #clock-cells = <0>;
199 #clock-cells = <0>;
205 #clock-cells = <0>;
211 #clock-cells = <0>;
217 #clock-cells = <0>;
223 #clock-cells = <0>;
229 #clock-cells = <0>;
238 #size-cells = <0>;
243 #clock-cells = <0>;
245 atmel,clk-output-range = <0 83000000>;
249 #clock-cells = <0>;
251 atmel,clk-output-range = <0 83000000>;
255 #clock-cells = <0>;
260 #clock-cells = <0>;
265 #clock-cells = <0>;
267 atmel,clk-output-range = <0 83000000>;
272 #clock-cells = <0>;
274 atmel,clk-output-range = <0 83000000>;
278 #clock-cells = <0>;
280 atmel,clk-output-range = <0 83000000>;
284 #clock-cells = <0>;
286 atmel,clk-output-range = <0 83000000>;
290 #clock-cells = <0>;
292 atmel,clk-output-range = <0 83000000>;
296 #clock-cells = <0>;
298 atmel,clk-output-range = <0 83000000>;
302 #clock-cells = <0>;
304 atmel,clk-output-range = <0 83000000>;
309 #clock-cells = <0>;
311 atmel,clk-output-range = <0 83000000>;
316 #clock-cells = <0>;
318 atmel,clk-output-range = <0 83000000>;
323 #clock-cells = <0>;
325 atmel,clk-output-range = <0 83000000>;
329 #clock-cells = <0>;
331 atmel,clk-output-range = <0 83000000>;
336 #clock-cells = <0>;
337 atmel,clk-output-range = <0 83000000>;
341 #clock-cells = <0>;
343 atmel,clk-output-range = <0 83000000>;
347 #clock-cells = <0>;
349 atmel,clk-output-range = <0 83000000>;
354 #clock-cells = <0>;
356 atmel,clk-output-range = <0 83000000>;
360 #clock-cells = <0>;
362 atmel,clk-output-range = <0 83000000>;
366 #clock-cells = <0>;
368 atmel,clk-output-range = <0 83000000>;
372 #clock-cells = <0>;
374 atmel,clk-output-range = <0 83000000>;
378 #clock-cells = <0>;
380 atmel,clk-output-range = <0 83000000>;
384 #clock-cells = <0>;
386 atmel,clk-output-range = <0 83000000>;
390 #clock-cells = <0>;
392 atmel,clk-output-range = <0 83000000>;
396 #clock-cells = <0>;
398 atmel,clk-output-range = <0 83000000>;
402 #clock-cells = <0>;
404 atmel,clk-output-range = <0 83000000>;
408 #clock-cells = <0>;
410 atmel,clk-output-range = <0 83000000>;
414 #clock-cells = <0>;
416 atmel,clk-output-range = <0 83000000>;
420 #clock-cells = <0>;
422 atmel,clk-output-range = <0 83000000>;
426 #clock-cells = <0>;
428 atmel,clk-output-range = <0 83000000>;
432 #clock-cells = <0>;
434 atmel,clk-output-range = <0 83000000>;
438 #clock-cells = <0>;
440 atmel,clk-output-range = <0 83000000>;
444 #clock-cells = <0>;
446 atmel,clk-output-range = <0 83000000>;
453 #size-cells = <0>;
458 #clock-cells = <0>;
463 #clock-cells = <0>;
468 #clock-cells = <0>;
473 #clock-cells = <0>;
478 #clock-cells = <0>;
483 #clock-cells = <0>;
488 #clock-cells = <0>;
493 #clock-cells = <0>;
499 #clock-cells = <0>;
505 #clock-cells = <0>;
510 #clock-cells = <0>;
515 #clock-cells = <0>;
521 #clock-cells = <0>;
530 #size-cells = <0>;
536 #clock-cells = <0>;
542 #clock-cells = <0>;
548 #clock-cells = <0>;
550 atmel,clk-output-range = <0 83000000>;
554 #clock-cells = <0>;
556 atmel,clk-output-range = <0 83000000>;
560 #clock-cells = <0>;
562 atmel,clk-output-range = <0 83000000>;
566 #clock-cells = <0>;
571 #clock-cells = <0>;
576 #clock-cells = <0>;
581 #clock-cells = <0>;
583 atmel,clk-output-range = <0 80000000>;
587 #clock-cells = <0>;
589 atmel,clk-output-range = <0 80000000>;
593 #clock-cells = <0>;
595 atmel,clk-output-range = <0 100000000>;
602 reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
605 #size-cells = <0>;
612 reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
615 #size-cells = <0>;
622 reg = <0xf8000000 0x100>;
626 #size-cells = <0>;
632 reg = <0xf8008000 0x1000>;
634 #size-cells = <0>;
642 reg = <0xf801c000 0x100>;
650 reg = <0xf8020000 0x100>;
658 reg = <0xf8024000 0x100>;
666 reg = <0xf8028000 0x100>;
668 #size-cells = <0>;
675 reg = <0xf8048000 0x10>;
681 reg = <0xf8048010 0x10>;
684 #size-cells = <0>;
690 reg = <0xf8048030 0x10>;
696 reg = <0xf8048040 0x10>;
703 reg = <0xf8030000 0x98>;
708 reg = <0xf8048050 0x4>;
712 #clock-cells = <0>;
720 #clock-cells = <0>;
727 #clock-cells = <0>;
734 reg = <0xfc000000 0x100>;
736 #size-cells = <0>;
742 reg = <0xfc008000 0x100>;
750 reg = <0xfc028000 0x100>;
752 #size-cells = <0>;
759 reg = <0xfc038000 0x600>;