Lines Matching +full:0 +full:xff750000
43 #size-cells = <0>;
71 cpu_l0: cpu@0 {
74 reg = <0x0 0x0>;
83 reg = <0x0 0x1>;
91 reg = <0x0 0x2>;
99 reg = <0x0 0x3>;
107 reg = <0x0 0x100>;
116 reg = <0x0 0x101>;
139 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
140 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
141 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
142 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
150 #clock-cells = <0>;
161 reg = <0x0 0xff6d0000 0x0 0x4000>;
162 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
163 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
171 reg = <0x0 0xff6e0000 0x0 0x4000>;
172 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
173 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
182 reg = <0x0 0xf8000000 0x0 0x2000000>,
183 <0x0 0xfd000000 0x0 0x1000000>;
189 bus-range = <0x0 0x1>;
194 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
195 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
196 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
198 interrupt-map-mask = <0 0 0 7>;
199 interrupt-map = <0 0 0 1 &pcie0_intc 0>,
200 <0 0 0 2 &pcie0_intc 1>,
201 <0 0 0 3 &pcie0_intc 2>,
202 <0 0 0 4 &pcie0_intc 3>;
203 linux,pci-domain = <0>;
205 msi-map = <0x0 &its 0x0 0x1000>;
208 ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
209 0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
220 #address-cells = <0>;
227 reg = <0x0 0xfe300000 0x0 0x10000>;
228 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
248 reg = <0x0 0xfe310000 0x0 0x4000>;
249 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
254 fifo-depth = <0x100>;
264 reg = <0x0 0xfe320000 0x0 0x4000>;
265 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
270 fifo-depth = <0x100>;
280 reg = <0x0 0xfe330000 0x0 0x10000>;
281 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
289 #clock-cells = <0>;
298 reg = <0x0 0xfe380000 0x0 0x20000>;
299 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
312 reg = <0x0 0xfe3a0000 0x0 0x20000>;
313 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
326 reg = <0x0 0xfe3c0000 0x0 0x20000>;
327 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
340 reg = <0x0 0xfe3e0000 0x0 0x20000>;
341 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
369 reg = <0x0 0xfe800000 0x0 0x100000>;
370 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
402 reg = <0x0 0xfe900000 0x0 0x100000>;
403 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
420 reg = <0x0 0xfec00000 0x0 0x100000>;
421 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
439 #size-cells = <0>;
441 dp_in_vopb: endpoint@0 {
442 reg = <0>;
462 reg = <0x0 0xfee00000 0 0x10000>, /* GICD */
463 <0x0 0xfef00000 0 0xc0000>, /* GICR */
464 <0x0 0xfff00000 0 0x10000>, /* GICC */
465 <0x0 0xfff10000 0 0x10000>, /* GICH */
466 <0x0 0xfff20000 0 0x10000>; /* GICV */
467 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
471 reg = <0x0 0xfee20000 0x0 0x20000>;
475 ppi_cluster0: interrupt-partition-0 {
487 reg = <0x0 0xff100000 0x0 0x100>;
488 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH 0>;
499 reg = <0x0 0xff110000 0x0 0x1000>;
504 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH 0>;
506 pinctrl-0 = <&i2c1_xfer>;
508 #size-cells = <0>;
514 reg = <0x0 0xff120000 0x0 0x1000>;
519 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH 0>;
521 pinctrl-0 = <&i2c2_xfer>;
523 #size-cells = <0>;
529 reg = <0x0 0xff130000 0x0 0x1000>;
534 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH 0>;
536 pinctrl-0 = <&i2c3_xfer>;
538 #size-cells = <0>;
544 reg = <0x0 0xff140000 0x0 0x1000>;
549 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>;
551 pinctrl-0 = <&i2c5_xfer>;
553 #size-cells = <0>;
559 reg = <0x0 0xff150000 0x0 0x1000>;
564 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH 0>;
566 pinctrl-0 = <&i2c6_xfer>;
568 #size-cells = <0>;
574 reg = <0x0 0xff160000 0x0 0x1000>;
579 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH 0>;
581 pinctrl-0 = <&i2c7_xfer>;
583 #size-cells = <0>;
589 reg = <0x0 0xff180000 0x0 0x100>;
592 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
596 pinctrl-0 = <&uart0_xfer>;
602 reg = <0x0 0xff190000 0x0 0x100>;
605 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0>;
609 pinctrl-0 = <&uart1_xfer>;
615 reg = <0x0 0xff1a0000 0x0 0x100>;
618 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
623 pinctrl-0 = <&uart2c_xfer>;
629 reg = <0x0 0xff1b0000 0x0 0x100>;
632 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
636 pinctrl-0 = <&uart3_xfer>;
642 reg = <0x0 0xff1c0000 0x0 0x1000>;
645 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH 0>;
647 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
649 #size-cells = <0>;
655 reg = <0x0 0xff1d0000 0x0 0x1000>;
658 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH 0>;
660 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
662 #size-cells = <0>;
668 reg = <0x0 0xff1e0000 0x0 0x1000>;
671 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH 0>;
673 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
675 #size-cells = <0>;
681 reg = <0x0 0xff1f0000 0x0 0x1000>;
684 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>;
686 pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>;
688 #size-cells = <0>;
694 reg = <0x0 0xff200000 0x0 0x1000>;
697 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
699 pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
701 #size-cells = <0>;
710 thermal-sensors = <&tsadc 0>;
776 reg = <0x0 0xff260000 0x0 0x100>;
777 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
787 pinctrl-0 = <&otp_gpio>;
796 reg = <0x0 0xffa58000 0x0 0x20>;
801 reg = <0x0 0xffa5c000 0x0 0x20>;
806 reg = <0x0 0xffa60080 0x0 0x20>;
811 reg = <0x0 0xffa60100 0x0 0x20>;
816 reg = <0x0 0xffa60180 0x0 0x20>;
821 reg = <0x0 0xffa70000 0x0 0x20>;
826 reg = <0x0 0xffa70080 0x0 0x20>;
831 reg = <0x0 0xffa74000 0x0 0x20>;
836 reg = <0x0 0xffa76000 0x0 0x20>;
841 reg = <0x0 0xffa90000 0x0 0x20>;
846 reg = <0x0 0xffa98000 0x0 0x20>;
851 reg = <0x0 0xffaa0000 0x0 0x20>;
856 reg = <0x0 0xffaa0080 0x0 0x20>;
861 reg = <0x0 0xffaa8000 0x0 0x20>;
866 reg = <0x0 0xffaa8080 0x0 0x20>;
871 reg = <0x0 0xffab0000 0x0 0x20>;
876 reg = <0x0 0xffab0080 0x0 0x20>;
881 reg = <0x0 0xffab8000 0x0 0x20>;
886 reg = <0x0 0xffac0000 0x0 0x20>;
891 reg = <0x0 0xffac0080 0x0 0x20>;
896 reg = <0x0 0xffac8000 0x0 0x20>;
901 reg = <0x0 0xffac8080 0x0 0x20>;
906 reg = <0x0 0xffad0000 0x0 0x20>;
911 reg = <0x0 0xffad8080 0x0 0x20>;
916 reg = <0x0 0xffae0000 0x0 0x20>;
921 reg = <0x0 0xff310000 0x0 0x1000>;
934 #size-cells = <0>;
990 #size-cells = <0>;
1018 #size-cells = <0>;
1054 #size-cells = <0>;
1077 reg = <0x0 0xff320000 0x0 0x1000>;
1088 reg = <0x0 0xff330000 0x0 0xe3d4>;
1093 reg = <0x0 0xff350000 0x0 0x1000>;
1096 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH 0>;
1098 pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>;
1100 #size-cells = <0>;
1106 reg = <0x0 0xff370000 0x0 0x100>;
1109 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0>;
1113 pinctrl-0 = <&uart4_xfer>;
1119 reg = <0x0 0xff3c0000 0x0 0x1000>;
1124 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
1126 pinctrl-0 = <&i2c0_xfer>;
1128 #size-cells = <0>;
1134 reg = <0x0 0xff3d0000 0x0 0x1000>;
1139 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH 0>;
1141 pinctrl-0 = <&i2c4_xfer>;
1143 #size-cells = <0>;
1149 reg = <0x0 0xff3e0000 0x0 0x1000>;
1154 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
1156 pinctrl-0 = <&i2c8_xfer>;
1158 #size-cells = <0>;
1164 reg = <0x0 0xff420000 0x0 0x10>;
1167 pinctrl-0 = <&pwm0_pin>;
1175 reg = <0x0 0xff420010 0x0 0x10>;
1178 pinctrl-0 = <&pwm1_pin>;
1186 reg = <0x0 0xff420020 0x0 0x10>;
1189 pinctrl-0 = <&pwm2_pin>;
1197 reg = <0x0 0xff420030 0x0 0x10>;
1200 pinctrl-0 = <&pwm3a_pin>;
1209 reg = <0x0 0xff620000 0x0 0x100>;
1213 reg = <0x00 0xff630000 0x00 0x4000>;
1225 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
1228 reg = <0x0 0xffa80000 0x0 0x0800
1229 0x0 0xffa80800 0x0 0x1800
1230 0x0 0xffa82000 0x0 0x2000
1231 0x0 0xffa84000 0x0 0x1000
1232 0x0 0xffa88000 0x0 0x0800
1233 0x0 0xffa88800 0x0 0x1800
1234 0x0 0xffa8a000 0x0 0x2000
1235 0x0 0xffa8c000 0x0 0x1000>;
1240 reg = <0x0 0xff690000 0x0 0x80>;
1248 reg = <0x07 0x10>;
1251 reg = <0x17 0x1>;
1254 reg = <0x18 0x1>;
1257 reg = <0x19 0x1>;
1260 reg = <0x1a 0x1>;
1263 reg = <0x1b 0x1>;
1266 reg = <0x1c 0x1>;
1273 reg = <0x0 0xff750000 0x0 0x1000>;
1284 reg = <0x0 0xff760000 0x0 0x1000>;
1315 reg = <0x0 0xff770000 0x0 0x10000>;
1326 reg = <0xe450 0x10>;
1329 #clock-cells = <0>;
1334 #phy-cells = <0>;
1335 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
1341 #phy-cells = <0>;
1342 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
1343 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
1344 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
1353 reg = <0xe460 0x10>;
1356 #clock-cells = <0>;
1361 #phy-cells = <0>;
1362 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
1368 #phy-cells = <0>;
1369 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
1370 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
1371 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
1380 reg = <0xf780 0x24>;
1383 #phy-cells = <0>;
1391 #phy-cells = <0>;
1400 reg = <0x0 0xff7c0000 0x0 0x40000>;
1415 #phy-cells = <0>;
1419 #phy-cells = <0>;
1425 reg = <0x0 0xff800000 0x0 0x40000>;
1440 #phy-cells = <0>;
1444 #phy-cells = <0>;
1450 reg = <0x0 0xff848000 0x0 0x100>;
1452 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
1457 reg = <0x0 0xff850000 0x0 0x1000>;
1458 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0>;
1465 reg = <0x0 0xff870000 0x0 0x1000>;
1466 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>;
1472 pinctrl-0 = <&spdif_bus>;
1474 #sound-dai-cells = <0>;
1480 reg = <0x0 0xff880000 0x0 0x1000>;
1482 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH 0>;
1483 dmas = <&dmac_bus 0>, <&dmac_bus 1>;
1488 pinctrl-0 = <&i2s0_8ch_bus>;
1490 #sound-dai-cells = <0>;
1496 reg = <0x0 0xff890000 0x0 0x1000>;
1497 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 0>;
1503 pinctrl-0 = <&i2s1_2ch_bus>;
1505 #sound-dai-cells = <0>;
1511 reg = <0x0 0xff8a0000 0x0 0x1000>;
1512 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 0>;
1518 #sound-dai-cells = <0>;
1525 reg = <0x0 0xff8f0000 0x0 0x3efc>;
1526 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1539 #size-cells = <0>;
1541 vopl_out_mipi: endpoint@0 {
1542 reg = <0>;
1570 reg = <0x0 0xff8f3f00 0x0 0x100>;
1571 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1576 #iommu-cells = <0>;
1583 reg = <0x0 0xff900000 0x0 0x3efc>;
1584 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1597 #size-cells = <0>;
1599 vopb_out_edp: endpoint@0 {
1600 reg = <0>;
1628 reg = <0x0 0xff903f00 0x0 0x100>;
1629 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1634 #iommu-cells = <0>;
1640 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1641 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1645 #iommu-cells = <0>;
1652 reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
1653 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
1657 #iommu-cells = <0>;
1679 reg = <0x0 0xff940000 0x0 0x20000>;
1680 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
1690 #sound-dai-cells = <0>;
1696 #size-cells = <0>;
1698 hdmi_in_vopb: endpoint@0 {
1699 reg = <0>;
1712 reg = <0x0 0xff960000 0x0 0x8000>;
1713 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
1719 #size-cells = <0>;
1725 #size-cells = <0>;
1726 mipi_in_vopb: endpoint@0 {
1727 reg = <0>;
1740 reg = <0x0 0xff968000 0x0 0x8000>;
1741 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
1753 #size-cells = <0>;
1755 mipi1_in: port@0 {
1756 reg = <0>;
1758 #size-cells = <0>;
1760 mipi1_in_vopb: endpoint@0 {
1761 reg = <0>;
1775 reg = <0x0 0xff970000 0x0 0x8000>;
1776 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
1780 pinctrl-0 = <&edp_hpd>;
1789 #size-cells = <0>;
1790 edp_in: port@0 {
1791 reg = <0>;
1793 #size-cells = <0>;
1795 edp_in_vopb: endpoint@0 {
1796 reg = <0>;
1810 reg = <0x0 0xff9a0000 0x0 0x10000>;
1811 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>,
1812 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
1813 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>;
1831 reg = <0x0 0xff720000 0x0 0x100>;
1833 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
1836 #gpio-cells = <0x2>;
1839 #interrupt-cells = <0x2>;
1844 reg = <0x0 0xff730000 0x0 0x100>;
1846 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
1849 #gpio-cells = <0x2>;
1852 #interrupt-cells = <0x2>;
1857 reg = <0x0 0xff780000 0x0 0x100>;
1859 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
1862 #gpio-cells = <0x2>;
1865 #interrupt-cells = <0x2>;
1870 reg = <0x0 0xff788000 0x0 0x100>;
1872 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
1875 #gpio-cells = <0x2>;
1878 #interrupt-cells = <0x2>;
1883 reg = <0x0 0xff790000 0x0 0x100>;
1885 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
1888 #gpio-cells = <0x2>;
1891 #interrupt-cells = <0x2>;
1981 rockchip,pins = <0 RK_PA0 RK_FUNC_2 &pcfg_pull_none>;
2191 <0 RK_PA3 RK_FUNC_1 &pcfg_pull_up>;
2196 <0 RK_PA4 RK_FUNC_1 &pcfg_pull_up>;
2226 <0 RK_PA7 RK_FUNC_1 &pcfg_pull_up>;
2231 <0 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
2241 rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
2503 <0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;