Lines Matching +full:opp +full:- +full:microvolt +full:- +full:speed

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
14 u-boot,dm-pre-reloc;
15 stdout-path = "serial2:115200n8";
16 u-boot,spl-boot-order = &spi_flash;
20 u-boot,spl-payload-offset = <0x40000>;
29 * - Rails that only connect to the EC (or devices that the EC talks to)
31 * - Rails _are_ included if the rails go to the AP even if the AP
40 * - The EC controls the enable and the EC always enables a rail as
42 * - The rails are actually connected to each other by a jumper and
47 ppvar_sys: ppvar-sys {
48 compatible = "regulator-fixed";
49 regulator-name = "ppvar_sys";
50 regulator-always-on;
51 regulator-boot-on;
54 pp1200_lpddr: pp1200-lpddr {
55 compatible = "regulator-fixed";
56 regulator-name = "pp1200_lpddr";
59 regulator-always-on;
60 regulator-boot-on;
61 regulator-min-microvolt = <1200000>;
62 regulator-max-microvolt = <1200000>;
64 vin-supply = <&ppvar_sys>;
68 compatible = "regulator-fixed";
69 regulator-name = "pp1800";
72 regulator-always-on;
73 regulator-boot-on;
74 regulator-min-microvolt = <1800000>;
75 regulator-max-microvolt = <1800000>;
77 vin-supply = <&ppvar_sys>;
81 compatible = "regulator-fixed";
82 regulator-name = "pp3300";
85 regulator-always-on;
86 regulator-boot-on;
87 regulator-min-microvolt = <3300000>;
88 regulator-max-microvolt = <3300000>;
90 vin-supply = <&ppvar_sys>;
94 compatible = "regulator-fixed";
95 regulator-name = "pp5000";
98 regulator-always-on;
99 regulator-boot-on;
100 regulator-min-microvolt = <5000000>;
101 regulator-max-microvolt = <5000000>;
103 vin-supply = <&ppvar_sys>;
106 ppvar_bigcpu_pwm: ppvar-bigcpu-pwm {
107 compatible = "pwm-regulator";
108 regulator-name = "ppvar_bigcpu_pwm";
111 pwm-supply = <&ppvar_sys>;
112 pwm-dutycycle-range = <100 0>;
113 pwm-dutycycle-unit = <100>;
116 regulator-always-on;
117 regulator-boot-on;
118 regulator-min-microvolt = <800107>;
119 regulator-max-microvolt = <1302232>;
122 ppvar_bigcpu: ppvar-bigcpu {
123 compatible = "vctrl-regulator";
124 regulator-name = "ppvar_bigcpu";
126 regulator-min-microvolt = <800107>;
127 regulator-max-microvolt = <1302232>;
129 ctrl-supply = <&ppvar_bigcpu_pwm>;
130 ctrl-voltage-range = <800107 1302232>;
132 regulator-settling-time-up-us = <322>;
135 ppvar_litcpu_pwm: ppvar-litcpu-pwm {
136 compatible = "pwm-regulator";
137 regulator-name = "ppvar_litcpu_pwm";
140 pwm-supply = <&ppvar_sys>;
141 pwm-dutycycle-range = <100 0>;
142 pwm-dutycycle-unit = <100>;
145 regulator-always-on;
146 regulator-boot-on;
147 regulator-min-microvolt = <797743>;
148 regulator-max-microvolt = <1307837>;
151 ppvar_litcpu: ppvar-litcpu {
152 compatible = "vctrl-regulator";
153 regulator-name = "ppvar_litcpu";
155 regulator-min-microvolt = <797743>;
156 regulator-max-microvolt = <1307837>;
158 ctrl-supply = <&ppvar_litcpu_pwm>;
159 ctrl-voltage-range = <797743 1307837>;
161 regulator-settling-time-up-us = <384>;
164 ppvar_gpu_pwm: ppvar-gpu-pwm {
165 compatible = "pwm-regulator";
166 regulator-name = "ppvar_gpu_pwm";
169 pwm-supply = <&ppvar_sys>;
170 pwm-dutycycle-range = <100 0>;
171 pwm-dutycycle-unit = <100>;
174 regulator-always-on;
175 regulator-boot-on;
176 regulator-min-microvolt = <786384>;
177 regulator-max-microvolt = <1217747>;
180 ppvar_gpu: ppvar-gpu {
181 compatible = "vctrl-regulator";
182 regulator-name = "ppvar_gpu";
184 regulator-min-microvolt = <786384>;
185 regulator-max-microvolt = <1217747>;
187 ctrl-supply = <&ppvar_gpu_pwm>;
188 ctrl-voltage-range = <786384 1217747>;
190 regulator-settling-time-up-us = <390>;
194 pp900_ddrpll: pp900-ap {
198 pp900_pll: pp900-ap {
202 pp900_pmu: pp900-ap {
229 pp3000_sd_slot: pp3000-sd-slot {
230 compatible = "regulator-fixed";
231 regulator-name = "pp3000_sd_slot";
232 pinctrl-names = "default";
233 pinctrl-0 = <&sd_slot_pwr_en>;
235 enable-active-high;
238 vin-supply = <&pp3000>;
242 * Technically, this is a small abuse of 'regulator-gpio'; this
247 ppvar_sd_card_io: ppvar-sd-card-io {
248 compatible = "regulator-gpio";
249 regulator-name = "ppvar_sd_card_io";
250 pinctrl-names = "default";
251 pinctrl-0 = <&sd_io_pwr_en &sd_pwr_1800_sel>;
253 enable-active-high;
254 enable-gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>;
259 regulator-min-microvolt = <1800000>;
260 regulator-max-microvolt = <3000000>;
264 pp3300_trackpad: pp3300-trackpad {
271 gpio_keys: gpio-keys {
272 compatible = "gpio-keys";
273 pinctrl-names = "default";
274 pinctrl-0 = <&bt_host_wake_l>;
276 wake_on_bt: wake-on-bt {
277 label = "Wake-on-Bluetooth";
280 wakeup-source;
286 pinctrl-names = "default";
287 pinctrl-0 = <&sdmode_en>;
288 sdmode-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
289 sdmode-delay = <2>;
290 #sound-dai-cells = <0>;
295 compatible = "rockchip,rk3399-gru-sound";
317 * of the default voltage, but the speed here should be fast enough and we need
323 opp-suspend;
329 opp-suspend;
334 cpu-supply = <&ppvar_litcpu>;
338 cpu-supply = <&ppvar_litcpu>;
342 cpu-supply = <&ppvar_litcpu>;
346 cpu-supply = <&ppvar_litcpu>;
350 cpu-supply = <&ppvar_bigcpu>;
354 cpu-supply = <&ppvar_bigcpu>;
358 assigned-clocks =
369 assigned-clock-rates =
387 mali-supply = <&ppvar_gpu>;
394 clock-frequency = <400000>;
397 i2c-scl-falling-time-ns = <50>;
398 i2c-scl-rising-time-ns = <300>;
404 clock-frequency = <400000>;
407 i2c-scl-falling-time-ns = <50>;
408 i2c-scl-rising-time-ns = <300>;
413 interrupt-parent = <&gpio1>;
416 clock-names = "mclk";
417 dlg,micbias-lvl = <2600>;
418 dlg,mic-amp-in-sel = "diff";
419 pinctrl-names = "default";
420 pinctrl-0 = <&headset_int_l>;
421 VDD-supply = <&pp1800>;
422 VDDMIC-supply = <&pp3300>;
423 VDDIO-supply = <&pp1800>;
426 dlg,adc-1bit-rpt = <1>;
427 dlg,btn-avg = <4>;
428 dlg,btn-cfg = <50>;
429 dlg,mic-det-thr = <500>;
430 dlg,jack-ins-deb = <20>;
431 dlg,jack-det-rate = "32ms_64ms";
432 dlg,jack-rem-deb = <1>;
434 dlg,a-d-btn-thr = <0xa>;
435 dlg,d-b-btn-thr = <0x16>;
436 dlg,b-c-btn-thr = <0x21>;
437 dlg,c-mic-btn-thr = <0x3E>;
453 audio-supply = <&pp1800_audio>; /* APIO5_VDD; 3d 4a */
454 bt656-supply = <&pp1800_ap_io>; /* APIO2_VDD; 2a 2b */
455 gpio1830-supply = <&pp3000_ap>; /* APIO4_VDD; 4c 4d */
456 sdmmc-supply = <&ppvar_sd_card_io>; /* SDMMC0_VDD; 4b */
462 ep-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
463 pinctrl-names = "default";
464 pinctrl-0 = <&pcie_clkreqn_cpm>, <&wifi_perst_l>;
465 vpcie3v3-supply = <&pp3300_wifi_bt>;
466 vpcie1v8-supply = <&wlan_pd_n>; /* HACK: see &wlan_pd_n */
467 vpcie0v9-supply = <&pp900_pcie>;
471 #address-cells = <3>;
472 #size-cells = <2>;
484 pmu1830-supply = <&pp1800_pmu>; /* PMUIO2_VDD */
509 assigned-clock-rates = <150000000>;
511 bus-width = <8>;
512 mmc-hs400-1_8v;
513 mmc-hs400-enhanced-strobe;
514 non-removable;
523 * hooked to ground. Because we specified "cd-gpios" below dw_mmc
529 pinctrl-names = "default";
530 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_gpio
533 bus-width = <4>;
534 cap-mmc-highspeed;
535 cap-sd-highspeed;
536 cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
537 disable-wp;
538 sd-uhs-sdr12;
539 sd-uhs-sdr25;
540 sd-uhs-sdr50;
541 sd-uhs-sdr104;
542 vmmc-supply = <&pp3000_sd_slot>;
543 vqmmc-supply = <&ppvar_sd_card_io>;
548 u-boot,dm-pre-reloc;
550 pinctrl-names = "default", "sleep";
551 pinctrl-1 = <&spi1_sleep>;
554 u-boot,dm-pre-reloc;
555 compatible = "jedec,spi-nor", "spi-flash";
559 spi-max-frequency = <10000000>;
569 spi-activate-delay = <100>;
570 spi-max-frequency = <3000000>;
571 spi-deactivate-delay = <200>;
574 compatible = "google,cros-ec-spi";
576 interrupt-parent = <&gpio0>;
578 ec-interrupt = <&gpio0 1 GPIO_ACTIVE_LOW>;
579 pinctrl-names = "default";
580 pinctrl-0 = <&ec_ap_int_l>;
581 spi-max-frequency = <3000000>;
583 i2c_tunnel: i2c-tunnel {
584 compatible = "google,cros-ec-i2c-tunnel";
585 google,remote-bus = <4>;
586 #address-cells = <1>;
587 #size-cells = <0>;
591 compatible = "google,extcon-usbc-cros-ec";
592 google,usb-port-id = <0>;
594 #extcon-cells = <0>;
602 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
603 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
633 u-boot,dm-pre-reloc;
666 #include <cros-ec-keyboard.dtsi>
667 #include <cros-ec-sbs.dtsi>
676 pinctrl-names = "default";
677 pinctrl-0 = <
678 &ap_pwroff /* AP will auto-assert this when in S3 */
682 pcfg_output_low: pcfg-output-low {
683 output-low;
686 pcfg_output_high: pcfg-output-high {
687 output-high;
690 pcfg_pull_none_8ma: pcfg-pull-none-8ma {
691 bias-disable;
692 drive-strength = <8>;
695 backlight-enable {
696 bl_en: bl-en {
701 cros-ec {
702 ec_ap_int_l: ec-ap-int-l {
707 discrete-regulators {
708 sd_io_pwr_en: sd-io-pwr-en {
713 sd_pwr_1800_sel: sd-pwr-1800-sel {
718 sd_slot_pwr_en: sd-slot-pwr-en {
726 headset_int_l: headset-int-l {
730 mic_int: mic-int {
736 sdmode_en: sdmode-en {
742 pcie_clkreqn_cpm: pci-clkreqn-cpm {
746 * de-assert it along and make ClockPM(CPM) work.
754 * We run sdmmc at max speed; bump up drive strength.
757 sdmmc_bus4: sdmmc-bus4 {
765 sdmmc_clk: sdmmc-clk {
770 sdmmc_cmd: sdmmc-cmd {
784 sdmmc_cd: sdmmc-cd {
790 sdmmc_cd_gpio: sdmmc-cd-gpio {
796 spi1_sleep: spi1-sleep {
809 touch_int_l: touch-int-l {
813 touch_reset_l: touch-reset-l {
819 ap_i2c_tp_pu_en: ap-i2c-tp-pu-en {
823 trackpad_int_l: trackpad-int-l {
829 wlan_module_reset_l: wlan-module-reset-l {
833 bt_host_wake_l: bt-host-wake-l {
839 write-protect {
840 ap_fw_wp: ap-fw-wp {