arm/dts/rk3399-evb.dts

1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
14 	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
15 		     "google,rk3399evb-rev2";
18 		stdout-path = &uart2;
19 		u-boot,spl-boot-order = \
23 	vdd_center: vdd-center {
24 		compatible = "pwm-regulator";
26 		regulator-name = "vdd_center";
27 		regulator-min-microvolt = <800000>;
28 		regulator-max-microvolt = <1400000>;
29 		regulator-init-microvolt = <950000>;
30 		regulator-always-on;
31 		regulator-boot-on;
36 		compatible = "regulator-fixed";
37 		regulator-name = "vccsys";
38 		regulator-boot-on;
39 		regulator-always-on;
42 	vcc3v3_sys: vcc3v3-sys {
43 		compatible = "regulator-fixed";
44 		regulator-name = "vcc3v3_sys";
45 		regulator-always-on;
46 		regulator-boot-on;
47 		regulator-min-microvolt = <3300000>;
48 		regulator-max-microvolt = <3300000>;
51 	vcc_phy: vcc-phy-regulator {
52 		compatible = "regulator-fixed";
53 		regulator-name = "vcc_phy";
54 		regulator-always-on;
55 		regulator-boot-on;
58 	vcc5v0_host: vcc5v0-host-en {
59 		compatible = "regulator-fixed";
60 		regulator-name = "vcc5v0_host";
64 	vcc5v0_typec0: vcc5v0-typec0-en {
65 		compatible = "regulator-fixed";
66 		regulator-name = "vcc5v0_typec0";
70 	vcc5v0_typec1: vcc5v0-typec1-en {
71 		compatible = "regulator-fixed";
72 		regulator-name = "vcc5v0_typec1";
76 	clkin_gmac: external-gmac-clock {
77 		compatible = "fixed-clock";
78 		clock-frequency = <125000000>;
79 		clock-output-names = "clkin_gmac";
80 		#clock-cells = <0>;
84 		compatible = "pwm-backlight";
85 		power-supply = <&vccsys>;
86 		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
87 		brightness-levels = <
120 		default-brightness-level = <200>;
122 		pinctrl-names = "default";
123 		pinctrl-0 = <&pwm0_pin>;
124 		pwm-delay-us = <10000>;
129 		compatible = "simple-panel";
130 		power-supply = <&vcc33_lcd>;
132 		/*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
158 	u-boot,dm-pre-reloc;
159 	bus-width = <4>;
164 	bus-width = <8>;
165 	mmc-hs400-1_8v;
166 	mmc-hs400-enhanced-strobe;
167 	non-removable;
184 	vbus-supply = <&vcc5v0_typec0>;
197 	vbus-supply = <&vcc5v0_typec1>;
203 	clock-frequency = <400000>;
204 	i2c-scl-falling-time-ns = <50>;
205 	i2c-scl-rising-time-ns = <100>;
206 	u-boot,dm-pre-reloc;
210 		clock-output-names = "xin32k", "wifibt_32kin";
211 		interrupt-parent = <&gpio0>;
213 		pinctrl-names = "default";
214 		pinctrl-0 = <&pmic_int_l>;
216 		rockchip,system-power-controller;
217 		#clock-cells = <1>;
218 		u-boot,dm-pre-reloc;
221 		vcc12-supply = <&vcc3v3_sys>;
225 				regulator-always-on;
226 				regulator-boot-on;
227 				regulator-name = "vcc33_lcd";
236 	display-timings {
238 		bits-per-pixel = <24>;
239 		clock-frequency = <160000000>;
240 		hfront-porch = <120>;
241 		hsync-len = <20>;
242 		hback-porch = <21>;
244 		vfront-porch = <21>;
245 		vsync-len = <3>;
246 		vback-porch = <18>;
248 		hsync-active = <0>;
249 		vsync-active = <0>;
250 		de-active = <1>;
251 		pixelclk-active = <0>;
258 		pmic_int_l: pmic-int-l {
263 		pmic_dvs2: pmic-dvs2 {
271         phy-supply = <&vcc_phy>;
272 	phy-mode = "rgmii";
274 	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
275 	snps,reset-active-low;
276 	snps,reset-delays-us = <0 10000 50000>;
277 	assigned-clocks = <&cru SCLK_RMII_SRC>;
278 	assigned-clock-parents = <&clkin_gmac>;
279 	pinctrl-names = "default";
280 	pinctrl-0 = <&rgmii_pins>;