Lines Matching +full:scl +full:- +full:output +full:- +full:only
1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = &uart2;
22 u-boot,dm-pre-reloc;
23 u-boot,boot0 = &spi_flash;
28 pinctrl-names = "default";
29 pinctrl-0 = <&fw_wp_ap>;
30 write-protect-gpio = <&gpio7 6 GPIO_ACTIVE_LOW>;
35 compatible = "pwm-backlight";
36 brightness-levels = <
69 default-brightness-level = <128>;
70 enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
71 backlight-boot-off;
72 pinctrl-names = "default";
73 pinctrl-0 = <&bl_en>;
78 compatible ="cnm,n116bgeea2","simple-panel";
80 power-supply = <&vcc33_lcd>;
84 gpio_keys: gpio-keys {
85 compatible = "gpio-keys";
87 pinctrl-names = "default";
88 pinctrl-0 = <&pwr_key_h>;
93 debounce-interval = <100>;
94 gpio-key,wakeup;
98 gpio-restart {
99 compatible = "gpio-restart";
101 pinctrl-names = "default";
102 pinctrl-0 = <&ap_warm_reset_h>;
106 emmc_pwrseq: emmc-pwrseq {
107 compatible = "mmc-pwrseq-emmc";
108 pinctrl-0 = <&emmc_reset>;
109 pinctrl-names = "default";
110 reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
114 compatible = "rockchip,rockchip-audio-max98090";
115 rockchip,model = "ROCKCHIP-I2S";
116 rockchip,i2s-controller = <&i2s>;
117 rockchip,audio-codec = <&max98090>;
118 rockchip,hp-det-gpios = <&gpio6 5 GPIO_ACTIVE_HIGH>;
119 rockchip,mic-det-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
120 rockchip,headset-codec = <&headsetcodec>;
121 pinctrl-names = "default";
122 pinctrl-0 = <&mic_det>, <&hp_det>;
125 vdd_logic: pwm-regulator {
126 compatible = "pwm-regulator";
129 voltage-table = <1350000 0>,
139 regulator-min-microvolt = <950000>;
140 regulator-max-microvolt = <1350000>;
141 regulator-name = "vdd_logic";
142 regulator-ramp-delay = <4000>;
145 vcc33_sys: vcc33-sys {
146 compatible = "regulator-fixed";
147 regulator-name = "vcc33_sys";
148 regulator-always-on;
149 regulator-boot-on;
150 regulator-min-microvolt = <3300000>;
151 regulator-max-microvolt = <3300000>;
152 vin-supply = <&vccsys>;
155 vcc_5v: vcc-5v {
156 compatible = "regulator-fixed";
157 regulator-name = "vcc_5v";
158 regulator-always-on;
159 regulator-boot-on;
160 regulator-min-microvolt = <5000000>;
161 regulator-max-microvolt = <5000000>;
164 vcc50_hdmi: vcc50-hdmi {
165 compatible = "regulator-fixed";
166 regulator-name = "vcc50_hdmi";
167 regulator-always-on;
168 regulator-boot-on;
169 vin-supply = <&vcc_5v>;
172 bt_regulator: bt-regulator {
176 * - BT_I2S_WS_BT_RFDISABLE_L
177 * - No connect
180 compatible = "regulator-fixed";
181 enable-active-high;
183 pinctrl-names = "default";
184 pinctrl-0 = <&bt_enable_l>;
185 regulator-name = "bt_regulator";
188 wifi_regulator: wifi-regulator {
192 * - SDIO_RESET_L_WL_REG_ON
193 * - PDN (power down when low)
196 compatible = "regulator-fixed";
197 enable-active-high;
199 pinctrl-names = "default";
200 pinctrl-0 = <&wifi_enable_h>;
201 regulator-name = "wifi_regulator";
204 vin-supply = <&bt_regulator>;
207 io-domains {
208 compatible = "rockchip,rk3288-io-voltage-domain";
211 audio-supply = <&vcc18_codec>;
212 bb-supply = <&vcc33_io>;
213 dvp-supply = <&vcc_18>;
214 flash0-supply = <&vcc18_flashio>;
215 gpio1830-supply = <&vcc33_io>;
216 gpio30-supply = <&vcc33_io>;
217 lcdc-supply = <&vcc33_lcd>;
218 sdcard-supply = <&vccio_sd>;
219 wifi-supply = <&vcc18_wl>;
224 cpu0-supply = <&vdd_cpu>;
228 logic-supply = <&vdd_logic>;
229 rockchip,odt-disable-freq = <333000000>;
230 rockchip,dll-disable-freq = <333000000>;
231 rockchip,sr-enable-freq = <333000000>;
232 rockchip,pd-enable-freq = <666000000>;
233 rockchip,auto-self-refresh-cnt = <0>;
234 rockchip,auto-power-down-cnt = <64>;
235 rockchip,ddr-speed-bin = <21>;
238 operating-points = <
252 broken-cd;
253 bus-width = <8>;
254 cap-mmc-highspeed;
255 mmc-hs200-1_8v;
256 mmc-pwrseq = <&emmc_pwrseq>;
257 disable-wp;
258 non-removable;
259 num-slots = <1>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8 &emmc_pwr>;
266 broken-cd;
267 bus-width = <4>;
268 cap-sd-highspeed;
269 sd-uhs-sdr12;
270 sd-uhs-sdr25;
271 sd-uhs-sdr50;
272 sd-uhs-sdr104;
273 cap-sdio-irq;
274 card-external-vcc-supply = <&wifi_regulator>;
277 clock-names = "biu", "ciu", "ciu_drv", "ciu_sample", "card_ext_clock";
278 keep-power-in-suspend;
279 non-removable;
280 num-slots = <1>;
281 pinctrl-names = "default";
282 pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
284 vmmc-supply = <&vcc33_sys>;
285 vqmmc-supply = <&vcc18_wl>;
289 bus-width = <4>;
290 cap-mmc-highspeed;
291 cap-sd-highspeed;
292 sd-uhs-sdr12;
293 sd-uhs-sdr25;
294 sd-uhs-sdr50;
295 sd-uhs-sdr104;
296 card-detect-delay = <200>;
297 cd-gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
298 num-slots = <1>;
300 vmmc-supply = <&vcc33_sd>;
301 vqmmc-supply = <&vccio_sd>;
306 u-boot,dm-pre-reloc;
309 u-boot,dm-pre-reloc;
310 compatible = "spidev", "spi-flash";
311 spi-max-frequency = <20000000>; /* Reduce for Dediprog em100 pro */
319 clock-frequency = <400000>;
320 i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
321 i2c-scl-rising-time-ns = <100>; /* 45ns measured */
322 u-boot,dm-pre-reloc;
326 clock-output-names = "xin32k", "wifibt_32kin";
327 interrupt-parent = <&gpio0>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pmic_int_l>;
332 rockchip,system-power-controller;
333 wakeup-source;
334 #clock-cells = <1>;
335 u-boot,dm-pre-reloc;
337 vcc1-supply = <&vcc33_sys>;
338 vcc2-supply = <&vcc33_sys>;
339 vcc3-supply = <&vcc33_sys>;
340 vcc4-supply = <&vcc33_sys>;
341 vcc6-supply = <&vcc_5v>;
342 vcc7-supply = <&vcc33_sys>;
343 vcc8-supply = <&vcc33_sys>;
344 vcc9-supply = <&vcc_5v>;
345 vcc10-supply = <&vcc33_sys>;
346 vcc11-supply = <&vcc_5v>;
347 vcc12-supply = <&vcc_18>;
349 vddio-supply = <&vcc33_io>;
353 regulator-always-on;
354 regulator-boot-on;
355 regulator-min-microvolt = <750000>;
356 regulator-max-microvolt = <1450000>;
357 regulator-name = "vdd_arm";
358 regulator-ramp-delay = <6001>;
359 regulator-suspend-mem-disabled;
363 regulator-always-on;
364 regulator-boot-on;
365 regulator-min-microvolt = <800000>;
366 regulator-max-microvolt = <1250000>;
367 regulator-name = "vdd_gpu";
368 regulator-ramp-delay = <6001>;
369 regulator-suspend-mem-disabled;
373 regulator-always-on;
374 regulator-boot-on;
375 regulator-name = "vcc135_ddr";
376 regulator-suspend-mem-enabled;
383 * are actually hooked together and only separated for
387 regulator-always-on;
388 regulator-boot-on;
389 regulator-min-microvolt = <1800000>;
390 regulator-max-microvolt = <1800000>;
391 regulator-name = "vcc_18";
392 regulator-suspend-mem-microvolt = <1800000>;
403 regulator-always-on;
404 regulator-boot-on;
405 regulator-min-microvolt = <3300000>;
406 regulator-max-microvolt = <3300000>;
407 regulator-name = "vcc33_io";
408 regulator-suspend-mem-microvolt = <3300000>;
412 regulator-always-on;
413 regulator-boot-on;
414 regulator-min-microvolt = <1000000>;
415 regulator-max-microvolt = <1000000>;
416 regulator-name = "vdd_10";
417 regulator-suspend-mem-microvolt = <1000000>;
421 regulator-min-microvolt = <1800000>;
422 regulator-max-microvolt = <3300000>;
423 regulator-name = "vccio_sd";
424 regulator-suspend-mem-disabled;
428 regulator-min-microvolt = <3300000>;
429 regulator-max-microvolt = <3300000>;
430 regulator-name = "vcc33_sd";
431 regulator-suspend-mem-disabled;
435 regulator-always-on;
436 regulator-boot-on;
437 regulator-min-microvolt = <1800000>;
438 regulator-max-microvolt = <1800000>;
439 regulator-name = "vcc18_codec";
440 regulator-suspend-mem-disabled;
444 regulator-always-on;
445 regulator-boot-on;
446 regulator-min-microvolt = <2500000>;
447 regulator-max-microvolt = <2500000>;
448 regulator-name = "vdd10_lcd_pwren_h";
449 regulator-suspend-mem-disabled;
453 regulator-always-on;
454 regulator-boot-on;
455 regulator-name = "vcc33_lcd";
456 regulator-suspend-mem-disabled;
465 clock-frequency = <400000>;
466 i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
467 i2c-scl-rising-time-ns = <100>; /* 40ns measured */
472 powered-while-suspended;
480 clock-frequency = <100000>;
481 i2c-scl-falling-time-ns = <50>; /* 10ns measured */
482 i2c-scl-rising-time-ns = <800>; /* 600ns measured */
487 #sound-dai-cells = <0>;
488 interrupt-parent = <&gpio6>;
490 pinctrl-names = "default";
491 pinctrl-0 = <&int_codec>;
498 clock-frequency = <400000>;
499 i2c-scl-falling-time-ns = <50>;
500 i2c-scl-rising-time-ns = <300>;
506 clock-frequency = <400000>;
507 i2c-scl-falling-time-ns = <50>; /* 11ns measured */
508 i2c-scl-rising-time-ns = <300>; /* 225ns measured */
513 interrupt-parent = <&gpio0>;
515 pinctrl-names = "default";
516 pinctrl-0 = <&ts3a227e_int_l>;
524 clock-frequency = <100000>;
525 i2c-scl-falling-time-ns = <300>;
526 i2c-scl-rising-time-ns = <1000>;
531 clock-names = "i2s_hclk", "i2s_clk", "i2s_clk_out";
551 pinctrl-names = "default";
552 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
554 assigned-clocks = <&cru SCLK_UART0>;
555 assigned-clock-rates = <48000000>;
564 u-boot,dm-pre-reloc;
565 reg-shift = <2>;
602 tsadc-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
603 tsadc-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
608 u-boot,dm-pre-reloc;
609 pinctrl-names = "default", "sleep";
610 pinctrl-0 = <
616 /* Wake only */
619 pinctrl-1 = <
625 /* Sleep only */
630 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
631 drive-strength = <8>;
634 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
635 bias-pull-up;
636 drive-strength = <8>;
639 pcfg_output_high: pcfg-output-high {
640 output-high;
643 pcfg_output_low: pcfg-output-low {
644 output-low;
648 bl_en: bl-en {
654 pwr_key_h: pwr-key-h {
660 hp_det: hp-det {
663 int_codec: int-codec {
666 mic_det: mic-det {
672 emmc_reset: emmc-reset {
680 emmc_clk: emmc-clk {
684 emmc_cmd: emmc-cmd {
688 emmc_bus8: emmc-bus8 {
701 ts3a227e_int_l: ts3a227e-int-l {
707 pmic_int_l: pmic-int-l {
716 ap_warm_reset_h: ap-warm-reset-h {
722 wifi_enable_h: wifienable-h {
727 bt_enable_l: bt-enable-l {
735 sdio0_bus4: sdio0-bus4 {
742 sdio0_cmd: sdio0-cmd {
746 sdio0_clk: sdio0-clk {
751 * These pins are only present on very new veyron boards; on
756 bt_dev_wake_sleep: bt-dev-wake-sleep {
760 bt_dev_wake_awake: bt-dev-wake-awake {
770 sdmmc_bus4: sdmmc-bus4 {
777 sdmmc_clk: sdmmc-clk {
781 sdmmc_cmd: sdmmc-cmd {
791 sdmmc_cd_disabled: sdmmc-cd-disabled {
796 sdmmc_cd_gpio: sdmmc-cd-gpio {
802 tpm_int_h: tpm-int-h {
807 write-protect {
808 fw_wp_ap: fw-wp-ap {
820 needs-reset-on-resume;
830 assigned-clocks = <&cru SCLK_USBPHY480M_SRC>;
831 assigned-clock-parents = <&cru SCLK_OTGPHY0>;
835 u-boot,dm-pre-reloc;
839 u-boot,dm-pre-reloc;
843 u-boot,dm-pre-reloc;