Lines Matching +full:pre +full:- +full:charge
2 * This file is dual-licensed: you can use it either under the terms
19 * b) Permission is hereby granted, free of charge, to any person
41 /dts-v1/;
42 #include "rk3288-rock2-som.dtsi"
46 compatible = "radxa,rock2-square", "rockchip,rk3288";
49 stdout-path = "serial2:115200n8";
52 ir: ir-receiver {
53 compatible = "gpio-ir-receiver";
55 pinctrl-names = "default";
56 pinctrl-0 = <&ir_int>;
60 compatible = "simple-audio-card";
61 simple-audio-card,name = "SPDIF";
62 simple-audio-card,dai-link@1 { /* S/PDIF - S/PDIF */
63 cpu { sound-dai = <&spdif>; };
64 codec { sound-dai = <&spdif_out>; };
68 spdif_out: spdif-out {
69 compatible = "linux,spdif-dit";
70 #sound-dai-cells = <0>;
73 vcc_usb_host: vcc-host-regulator {
74 compatible = "regulator-fixed";
75 enable-active-high;
77 pinctrl-names = "default";
78 pinctrl-0 = <&host_vbus_drv>;
79 /* Always on as the rockchip usb phy doesn't have a vbus-supply
82 regulator-always-on;
83 regulator-name = "vcc_host";
86 vcc_sd: sdmmc-regulator {
87 compatible = "regulator-fixed";
89 pinctrl-names = "default";
90 pinctrl-0 = <&sdmmc_pwr>;
91 regulator-name = "vcc_sd";
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
94 vin-supply = <&vcc_io>;
99 u-boot,dm-pre-reloc;
100 bus-width = <4>;
101 cap-mmc-highspeed;
102 cap-sd-highspeed;
103 card-detect-delay = <200>;
104 disable-wp; /* wp not hooked up */
105 num-slots = <1>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
108 vmmc-supply = <&vcc_sd>;
109 vqmmc-supply = <&vccio_sd>;
118 ddc-i2c-bus = <&i2c5>;
126 #clock-cells = <0>;
127 clock-frequency = <32768>;
128 clock-output-names = "xin32k";
129 interrupt-parent = <&gpio0>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&pmic_int>;
142 u-boot,dm-pre-reloc;
144 ir_int: ir-int {
150 pmic_int: pmic-int {
156 host_vbus_drv: host-vbus-drv {
162 sdmmc_pwr: sdmmc-pwr {
174 u-boot,dm-pre-reloc;
175 reg-shift = <2>;
187 rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
192 rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
194 rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
198 u-boot,dm-pre-reloc;