Lines Matching +full:phy +full:- +full:input +full:- +full:delay +full:- +full:mmc +full:- +full:highspeed
1 // SPDX-License-Identifier: GPL-2.0+ OR X11
6 /dts-v1/;
12 compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
15 stdout-path = &uart2;
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "ext_gmac";
27 #clock-cells = <0>;
30 vcc_phy: vcc-phy-regulator {
31 compatible = "regulator-fixed";
32 enable-active-high;
33 regulator-name = "vcc_phy";
34 regulator-min-microvolt = <1800000>;
35 regulator-max-microvolt = <1800000>;
36 regulator-always-on;
37 regulator-boot-on;
42 rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3
47 rockchip,phy-timing = <0x220 0x1 0x0 0x0 0x0 0x4 0x60>;
48 rockchip,sdram-params = <0x428B188 0x0 0x21 0x472 0x15
53 assigned-clocks = <&cru SCLK_MAC_EXTCLK>, <&cru SCLK_MAC>;
54 assigned-clock-parents = <&ext_gmac>, <&cru SCLK_MAC_EXTCLK>;
55 clock_in_out = "input";
56 phy-supply = <&vcc_phy>;
57 phy-mode = "rgmii";
58 pinctrl-names = "default";
59 pinctrl-0 = <&rgmii_pins>;
60 snps,reset-gpio = <&gpio2 RK_PD0 GPIO_ACTIVE_LOW>;
61 snps,reset-active-low;
62 snps,reset-delays-us = <0 10000 1000000>;
69 u-boot,dm-pre-reloc;
75 bus-width = <4>;
76 cap-mmc-highspeed;
77 cap-sd-highspeed;
78 card-detect-delay = <200>;
79 disable-wp;
80 num-slots = <1>;
81 supports-sd;