Lines Matching +full:- +full:resets
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
18 /* External CAN clock - to be overridden by boards that provide it */
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <0>;
26 #address-cells = <1>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a53", "arm,armv8";
33 power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
34 next-level-cache = <&L2_CA53>;
35 enable-method = "psci";
38 L2_CA53: cache-controller-1 {
40 power-domains = <&sysc R8A77995_PD_CA53_SCU>;
41 cache-unified;
42 cache-level = <2>;
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
50 clock-frequency = <0>;
54 compatible = "arm,cortex-a53-pmu";
55 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
59 compatible = "arm,psci-1.0", "arm,psci-0.2";
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
66 clock-frequency = <0>;
70 compatible = "simple-bus";
71 interrupt-parent = <&gic>;
72 #address-cells = <2>;
73 #size-cells = <2>;
77 compatible = "renesas,r8a77995-wdt",
78 "renesas,rcar-gen3-wdt";
81 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
82 resets = <&cpg 402>;
87 compatible = "renesas,gpio-r8a77995",
88 "renesas,rcar-gen3-gpio";
91 #gpio-cells = <2>;
92 gpio-controller;
93 gpio-ranges = <&pfc 0 0 9>;
94 #interrupt-cells = <2>;
95 interrupt-controller;
97 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
98 resets = <&cpg 912>;
102 compatible = "renesas,gpio-r8a77995",
103 "renesas,rcar-gen3-gpio";
106 #gpio-cells = <2>;
107 gpio-controller;
108 gpio-ranges = <&pfc 0 32 32>;
109 #interrupt-cells = <2>;
110 interrupt-controller;
112 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
113 resets = <&cpg 911>;
117 compatible = "renesas,gpio-r8a77995",
118 "renesas,rcar-gen3-gpio";
121 #gpio-cells = <2>;
122 gpio-controller;
123 gpio-ranges = <&pfc 0 64 32>;
124 #interrupt-cells = <2>;
125 interrupt-controller;
127 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
128 resets = <&cpg 910>;
132 compatible = "renesas,gpio-r8a77995",
133 "renesas,rcar-gen3-gpio";
136 #gpio-cells = <2>;
137 gpio-controller;
138 gpio-ranges = <&pfc 0 96 10>;
139 #interrupt-cells = <2>;
140 interrupt-controller;
142 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
143 resets = <&cpg 909>;
147 compatible = "renesas,gpio-r8a77995",
148 "renesas,rcar-gen3-gpio";
151 #gpio-cells = <2>;
152 gpio-controller;
153 gpio-ranges = <&pfc 0 128 32>;
154 #interrupt-cells = <2>;
155 interrupt-controller;
157 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
158 resets = <&cpg 908>;
162 compatible = "renesas,gpio-r8a77995",
163 "renesas,rcar-gen3-gpio";
166 #gpio-cells = <2>;
167 gpio-controller;
168 gpio-ranges = <&pfc 0 160 21>;
169 #interrupt-cells = <2>;
170 interrupt-controller;
172 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
173 resets = <&cpg 907>;
177 compatible = "renesas,gpio-r8a77995",
178 "renesas,rcar-gen3-gpio";
181 #gpio-cells = <2>;
182 gpio-controller;
183 gpio-ranges = <&pfc 0 192 14>;
184 #interrupt-cells = <2>;
185 interrupt-controller;
187 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
188 resets = <&cpg 906>;
191 pfc: pin-controller@e6060000 {
192 compatible = "renesas,pfc-r8a77995";
196 cpg: clock-controller@e6150000 {
197 compatible = "renesas,r8a77995-cpg-mssr";
200 clock-names = "extal";
201 #clock-cells = <2>;
202 #power-domain-cells = <0>;
203 #reset-cells = <1>;
206 rst: reset-controller@e6160000 {
207 compatible = "renesas,r8a77995-rst";
211 sysc: system-controller@e6180000 {
212 compatible = "renesas,r8a77995-sysc";
214 #power-domain-cells = <1>;
218 compatible = "renesas,thermal-r8a77995";
224 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
225 resets = <&cpg 522>;
226 #thermal-sensor-cells = <0>;
229 intc_ex: interrupt-controller@e61c0000 {
230 compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
231 #interrupt-cells = <2>;
232 interrupt-controller;
241 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
242 resets = <&cpg 407>;
246 compatible = "renesas,hscif-r8a77995",
247 "renesas,rcar-gen3-hscif",
254 clock-names = "fck", "brg_int", "scif_clk";
257 dma-names = "tx", "rx", "tx", "rx";
258 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
259 resets = <&cpg 520>;
264 compatible = "renesas,hscif-r8a77995",
265 "renesas,rcar-gen3-hscif",
272 clock-names = "fck", "brg_int", "scif_clk";
274 dma-names = "tx", "rx";
275 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
276 resets = <&cpg 517>;
281 #address-cells = <1>;
282 #size-cells = <0>;
283 compatible = "renesas,i2c-r8a77995",
284 "renesas,rcar-gen3-i2c";
288 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
289 resets = <&cpg 931>;
292 dma-names = "tx", "rx", "tx", "rx";
293 i2c-scl-internal-delay-ns = <6>;
298 #address-cells = <1>;
299 #size-cells = <0>;
300 compatible = "renesas,i2c-r8a77995",
301 "renesas,rcar-gen3-i2c";
305 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
306 resets = <&cpg 930>;
309 dma-names = "tx", "rx", "tx", "rx";
310 i2c-scl-internal-delay-ns = <6>;
315 #address-cells = <1>;
316 #size-cells = <0>;
317 compatible = "renesas,i2c-r8a77995",
318 "renesas,rcar-gen3-i2c";
322 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
323 resets = <&cpg 929>;
326 dma-names = "tx", "rx", "tx", "rx";
327 i2c-scl-internal-delay-ns = <6>;
332 #address-cells = <1>;
333 #size-cells = <0>;
334 compatible = "renesas,i2c-r8a77995",
335 "renesas,rcar-gen3-i2c";
339 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
340 resets = <&cpg 928>;
342 dma-names = "tx", "rx";
343 i2c-scl-internal-delay-ns = <6>;
348 compatible = "renesas,r8a77995-canfd",
349 "renesas,rcar-gen3-canfd";
356 clock-names = "fck", "canfd", "can_clk";
357 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
358 assigned-clock-rates = <40000000>;
359 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
360 resets = <&cpg 914>;
372 dmac0: dma-controller@e6700000 {
373 compatible = "renesas,dmac-r8a77995",
374 "renesas,rcar-dmac";
385 interrupt-names = "error",
389 clock-names = "fck";
390 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
391 resets = <&cpg 219>;
392 #dma-cells = <1>;
393 dma-channels = <8>;
396 dmac1: dma-controller@e7300000 {
397 compatible = "renesas,dmac-r8a77995",
398 "renesas,rcar-dmac";
409 interrupt-names = "error",
413 clock-names = "fck";
414 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
415 resets = <&cpg 218>;
416 #dma-cells = <1>;
417 dma-channels = <8>;
420 dmac2: dma-controller@e7310000 {
421 compatible = "renesas,dmac-r8a77995",
422 "renesas,rcar-dmac";
433 interrupt-names = "error",
437 clock-names = "fck";
438 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
439 resets = <&cpg 217>;
440 #dma-cells = <1>;
441 dma-channels = <8>;
445 compatible = "renesas,ipmmu-r8a77995";
447 renesas,ipmmu-main = <&ipmmu_mm 0>;
448 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
449 #iommu-cells = <1>;
453 compatible = "renesas,ipmmu-r8a77995";
455 renesas,ipmmu-main = <&ipmmu_mm 1>;
456 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
457 #iommu-cells = <1>;
461 compatible = "renesas,ipmmu-r8a77995";
463 renesas,ipmmu-main = <&ipmmu_mm 2>;
464 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
465 #iommu-cells = <1>;
469 compatible = "renesas,ipmmu-r8a77995";
473 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
474 #iommu-cells = <1>;
478 compatible = "renesas,ipmmu-r8a77995";
480 renesas,ipmmu-main = <&ipmmu_mm 4>;
481 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
482 #iommu-cells = <1>;
486 compatible = "renesas,ipmmu-r8a77995";
488 renesas,ipmmu-main = <&ipmmu_mm 6>;
489 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
490 #iommu-cells = <1>;
494 compatible = "renesas,ipmmu-r8a77995";
496 renesas,ipmmu-main = <&ipmmu_mm 10>;
497 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
498 #iommu-cells = <1>;
502 compatible = "renesas,ipmmu-r8a77995";
504 renesas,ipmmu-main = <&ipmmu_mm 12>;
505 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
506 #iommu-cells = <1>;
510 compatible = "renesas,ipmmu-r8a77995";
512 renesas,ipmmu-main = <&ipmmu_mm 14>;
513 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
514 #iommu-cells = <1>;
518 compatible = "renesas,ipmmu-r8a77995";
520 renesas,ipmmu-main = <&ipmmu_mm 16>;
521 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
522 #iommu-cells = <1>;
526 compatible = "renesas,etheravb-r8a77995",
527 "renesas,etheravb-rcar-gen3";
554 interrupt-names = "ch0", "ch1", "ch2", "ch3",
562 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
563 resets = <&cpg 812>;
564 phy-mode = "rgmii";
566 #address-cells = <1>;
567 #size-cells = <0>;
572 compatible = "renesas,can-r8a77995",
573 "renesas,rcar-gen3-can";
579 clock-names = "clkp1", "clkp2", "can_clk";
580 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
581 assigned-clock-rates = <40000000>;
582 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
583 resets = <&cpg 916>;
588 compatible = "renesas,can-r8a77995",
589 "renesas,rcar-gen3-can";
595 clock-names = "clkp1", "clkp2", "can_clk";
596 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
597 assigned-clock-rates = <40000000>;
598 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
599 resets = <&cpg 915>;
604 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
606 #pwm-cells = <2>;
608 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
609 resets = <&cpg 523>;
614 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
616 #pwm-cells = <2>;
618 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
619 resets = <&cpg 523>;
624 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
626 #pwm-cells = <2>;
628 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
629 resets = <&cpg 523>;
634 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
636 #pwm-cells = <2>;
638 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
639 resets = <&cpg 523>;
644 compatible = "renesas,scif-r8a77995",
645 "renesas,rcar-gen3-scif", "renesas,scif";
651 clock-names = "fck", "brg_int", "scif_clk";
654 dma-names = "tx", "rx", "tx", "rx";
655 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
656 resets = <&cpg 207>;
661 compatible = "renesas,scif-r8a77995",
662 "renesas,rcar-gen3-scif", "renesas,scif";
668 clock-names = "fck", "brg_int", "scif_clk";
671 dma-names = "tx", "rx", "tx", "rx";
672 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
673 resets = <&cpg 206>;
678 compatible = "renesas,scif-r8a77995",
679 "renesas,rcar-gen3-scif", "renesas,scif";
685 clock-names = "fck", "brg_int", "scif_clk";
688 dma-names = "tx", "rx", "tx", "rx";
689 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
690 resets = <&cpg 310>;
695 compatible = "renesas,scif-r8a77995",
696 "renesas,rcar-gen3-scif", "renesas,scif";
702 clock-names = "fck", "brg_int", "scif_clk";
704 dma-names = "tx", "rx";
705 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
706 resets = <&cpg 204>;
711 compatible = "renesas,scif-r8a77995",
712 "renesas,rcar-gen3-scif", "renesas,scif";
718 clock-names = "fck", "brg_int", "scif_clk";
720 dma-names = "tx", "rx";
721 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
722 resets = <&cpg 203>;
727 compatible = "renesas,scif-r8a77995",
728 "renesas,rcar-gen3-scif", "renesas,scif";
734 clock-names = "fck", "brg_int", "scif_clk";
737 dma-names = "tx", "rx", "tx", "rx";
738 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
739 resets = <&cpg 202>;
744 compatible = "renesas,msiof-r8a77995",
745 "renesas,rcar-gen3-msiof";
751 dma-names = "tx", "rx", "tx", "rx";
752 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
753 resets = <&cpg 211>;
754 #address-cells = <1>;
755 #size-cells = <0>;
760 compatible = "renesas,msiof-r8a77995",
761 "renesas,rcar-gen3-msiof";
767 dma-names = "tx", "rx", "tx", "rx";
768 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
769 resets = <&cpg 210>;
770 #address-cells = <1>;
771 #size-cells = <0>;
776 compatible = "renesas,msiof-r8a77995",
777 "renesas,rcar-gen3-msiof";
782 dma-names = "tx", "rx";
783 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
784 resets = <&cpg 209>;
785 #address-cells = <1>;
786 #size-cells = <0>;
791 compatible = "renesas,msiof-r8a77995",
792 "renesas,rcar-gen3-msiof";
797 dma-names = "tx", "rx";
798 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
799 resets = <&cpg 208>;
800 #address-cells = <1>;
801 #size-cells = <0>;
806 compatible = "renesas,vin-r8a77995";
810 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
811 resets = <&cpg 807>;
817 compatible = "generic-ohci";
822 phy-names = "usb";
823 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
824 resets = <&cpg 703>;
829 compatible = "generic-ehci";
834 phy-names = "usb";
836 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
837 resets = <&cpg 703>;
841 usb2_phy0: usb-phy@ee080200 {
842 compatible = "renesas,usb2-phy-r8a77995",
843 "renesas,rcar-gen3-usb2-phy";
847 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
848 resets = <&cpg 703>;
849 #phy-cells = <0>;
854 compatible = "renesas,sdhi-r8a77995",
855 "renesas,rcar-gen3-sdhi";
859 max-frequency = <200000000>;
860 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
861 resets = <&cpg 312>;
865 gic: interrupt-controller@f1010000 {
866 compatible = "arm,gic-400";
867 #interrupt-cells = <3>;
868 #address-cells = <0>;
869 interrupt-controller;
877 clock-names = "clk";
878 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
879 resets = <&cpg 408>;
887 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
888 resets = <&cpg 627>;
897 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
898 resets = <&cpg 623>;
907 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
908 resets = <&cpg 622>;
916 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
917 resets = <&cpg 607>;
925 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
926 resets = <&cpg 603>;
934 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
935 resets = <&cpg 602>;
940 compatible = "renesas,du-r8a77995";
946 clock-names = "du.0", "du.1";
951 #address-cells = <1>;
952 #size-cells = <0>;
980 thermal-zones {
981 cpu_thermal: cpu-thermal {
982 polling-delay-passive = <250>;
983 polling-delay = <1000>;
984 thermal-sensors = <&thermal>;
987 cpu-crit {
994 cooling-maps {
1000 compatible = "arm,armv8-timer";
1001 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,