Lines Matching +full:0 +full:xee000000
19 #size-cells = <0>;
21 a53_0: cpu@0 {
23 reg = <0>;
39 L2_CA53: cache-controller-0 {
49 #clock-cells = <0>;
51 clock-frequency = <0>;
76 reg = <0 0xe6020000 0 0x0c>;
86 reg = <0 0xe6050000 0 0x50>;
90 gpio-ranges = <&pfc 0 0 18>;
101 reg = <0 0xe6051000 0 0x50>;
105 gpio-ranges = <&pfc 0 32 23>;
116 reg = <0 0xe6052000 0 0x50>;
120 gpio-ranges = <&pfc 0 64 26>;
131 reg = <0 0xe6053000 0 0x50>;
135 gpio-ranges = <&pfc 0 96 16>;
146 reg = <0 0xe6054000 0 0x50>;
150 gpio-ranges = <&pfc 0 128 11>;
161 reg = <0 0xe6055000 0 0x50>;
165 gpio-ranges = <&pfc 0 160 20>;
176 reg = <0 0xe6055400 0 0x50>;
180 gpio-ranges = <&pfc 0 192 18>;
190 reg = <0 0xe6060000 0 0x508>;
195 reg = <0 0xe6150000 0 0x1000>;
199 #power-domain-cells = <0>;
205 reg = <0 0xe6160000 0 0x0200>;
210 reg = <0 0xe6180000 0 0x0400>;
216 reg = <0 0xe6740000 0 0x1000>;
217 renesas,ipmmu-main = <&ipmmu_mm 0>;
224 reg = <0 0xe7740000 0 0x1000>;
232 reg = <0 0xe6570000 0 0x1000>;
240 reg = <0 0xe67b0000 0 0x1000>;
249 reg = <0 0xec670000 0 0x1000>;
257 reg = <0 0xfd800000 0 0x1000>;
265 reg = <0 0xffc80000 0 0x1000>;
273 reg = <0 0xfe6b0000 0 0x1000>;
281 reg = <0 0xfebd0000 0 0x1000>;
289 reg = <0 0xfe990000 0 0x1000>;
298 reg = <0 0xe6800000 0 0x800>;
336 #size-cells = <0>;
343 reg = <0 0xe6e88000 0 64>;
355 reg = <0 0xee000000 0 0xc00>;
365 reg = <0 0xee080000 0 0x100>;
377 reg = <0 0xee080100 0 0x100>;
391 reg = <0 0xee080200 0 0x700>;
396 #phy-cells = <0>;
403 #address-cells = <0>;
405 reg = <0x0 0xf1010000 0 0x1000>,
406 <0x0 0xf1020000 0 0x20000>,
407 <0x0 0xf1040000 0 0x20000>,
408 <0x0 0xf1060000 0 0x20000>;
419 reg = <0 0xfff00044 0 4>;