Lines Matching +full:ipmmu +full:- +full:main
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a77970-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
28 #address-cells = <1>;
29 #size-cells = <0>;
33 compatible = "arm,cortex-a53", "arm,armv8";
36 power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
37 next-level-cache = <&L2_CA53>;
38 enable-method = "psci";
43 compatible = "arm,cortex-a53", "arm,armv8";
46 power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
47 next-level-cache = <&L2_CA53>;
48 enable-method = "psci";
51 L2_CA53: cache-controller {
53 power-domains = <&sysc R8A77970_PD_CA53_SCU>;
54 cache-unified;
55 cache-level = <2>;
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
63 clock-frequency = <0>;
67 compatible = "fixed-clock";
68 #clock-cells = <0>;
70 clock-frequency = <0>;
74 compatible = "arm,cortex-a53-pmu";
75 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
77 interrupt-affinity = <&a53_0>, <&a53_1>;
81 compatible = "arm,psci-1.0", "arm,psci-0.2";
85 /* External CAN clock - to be overridden by boards that provide it */
87 compatible = "fixed-clock";
88 #clock-cells = <0>;
89 clock-frequency = <0>;
92 /* External SCIF clock - to be overridden by boards that provide it */
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 clock-frequency = <0>;
100 compatible = "simple-bus";
101 interrupt-parent = <&gic>;
103 #address-cells = <2>;
104 #size-cells = <2>;
108 compatible = "renesas,r8a77970-wdt",
109 "renesas,rcar-gen3-wdt";
112 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
118 compatible = "renesas,gpio-r8a77970",
119 "renesas,rcar-gen3-gpio";
122 #gpio-cells = <2>;
123 gpio-controller;
124 gpio-ranges = <&pfc 0 0 22>;
125 #interrupt-cells = <2>;
126 interrupt-controller;
128 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
133 compatible = "renesas,gpio-r8a77970",
134 "renesas,rcar-gen3-gpio";
137 #gpio-cells = <2>;
138 gpio-controller;
139 gpio-ranges = <&pfc 0 32 28>;
140 #interrupt-cells = <2>;
141 interrupt-controller;
143 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
148 compatible = "renesas,gpio-r8a77970",
149 "renesas,rcar-gen3-gpio";
152 #gpio-cells = <2>;
153 gpio-controller;
154 gpio-ranges = <&pfc 0 64 17>;
155 #interrupt-cells = <2>;
156 interrupt-controller;
158 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
163 compatible = "renesas,gpio-r8a77970",
164 "renesas,rcar-gen3-gpio";
167 #gpio-cells = <2>;
168 gpio-controller;
169 gpio-ranges = <&pfc 0 96 17>;
170 #interrupt-cells = <2>;
171 interrupt-controller;
173 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
178 compatible = "renesas,gpio-r8a77970",
179 "renesas,rcar-gen3-gpio";
182 #gpio-cells = <2>;
183 gpio-controller;
184 gpio-ranges = <&pfc 0 128 6>;
185 #interrupt-cells = <2>;
186 interrupt-controller;
188 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
193 compatible = "renesas,gpio-r8a77970",
194 "renesas,rcar-gen3-gpio";
197 #gpio-cells = <2>;
198 gpio-controller;
199 gpio-ranges = <&pfc 0 160 15>;
200 #interrupt-cells = <2>;
201 interrupt-controller;
203 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
207 pfc: pin-controller@e6060000 {
208 compatible = "renesas,pfc-r8a77970";
212 cpg: clock-controller@e6150000 {
213 compatible = "renesas,r8a77970-cpg-mssr";
216 clock-names = "extal", "extalr";
217 #clock-cells = <2>;
218 #power-domain-cells = <0>;
219 #reset-cells = <1>;
222 rst: reset-controller@e6160000 {
223 compatible = "renesas,r8a77970-rst";
227 sysc: system-controller@e6180000 {
228 compatible = "renesas,r8a77970-sysc";
230 #power-domain-cells = <1>;
233 intc_ex: interrupt-controller@e61c0000 {
234 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
235 #interrupt-cells = <2>;
236 interrupt-controller;
245 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
250 compatible = "renesas,i2c-r8a77970",
251 "renesas,rcar-gen3-i2c";
255 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
259 dma-names = "tx", "rx", "tx", "rx";
260 i2c-scl-internal-delay-ns = <6>;
261 #address-cells = <1>;
262 #size-cells = <0>;
267 compatible = "renesas,i2c-r8a77970",
268 "renesas,rcar-gen3-i2c";
272 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
276 dma-names = "tx", "rx", "tx", "rx";
277 i2c-scl-internal-delay-ns = <6>;
278 #address-cells = <1>;
279 #size-cells = <0>;
284 compatible = "renesas,i2c-r8a77970",
285 "renesas,rcar-gen3-i2c";
289 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
293 dma-names = "tx", "rx", "tx", "rx";
294 i2c-scl-internal-delay-ns = <6>;
295 #address-cells = <1>;
296 #size-cells = <0>;
301 compatible = "renesas,i2c-r8a77970",
302 "renesas,rcar-gen3-i2c";
306 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
310 dma-names = "tx", "rx", "tx", "rx";
311 i2c-scl-internal-delay-ns = <6>;
312 #address-cells = <1>;
313 #size-cells = <0>;
318 compatible = "renesas,i2c-r8a77970",
319 "renesas,rcar-gen3-i2c";
323 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
327 dma-names = "tx", "rx", "tx", "rx";
328 i2c-scl-internal-delay-ns = <6>;
329 #address-cells = <1>;
330 #size-cells = <0>;
335 compatible = "renesas,hscif-r8a77970",
336 "renesas,rcar-gen3-hscif",
343 clock-names = "fck", "brg_int", "scif_clk";
346 dma-names = "tx", "rx", "tx", "rx";
347 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
353 compatible = "renesas,hscif-r8a77970",
354 "renesas,rcar-gen3-hscif",
361 clock-names = "fck", "brg_int", "scif_clk";
364 dma-names = "tx", "rx", "tx", "rx";
365 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
371 compatible = "renesas,hscif-r8a77970",
372 "renesas,rcar-gen3-hscif",
379 clock-names = "fck", "brg_int", "scif_clk";
382 dma-names = "tx", "rx", "tx", "rx";
383 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
389 compatible = "renesas,hscif-r8a77970",
390 "renesas,rcar-gen3-hscif", "renesas,hscif";
396 clock-names = "fck", "brg_int", "scif_clk";
399 dma-names = "tx", "rx", "tx", "rx";
400 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
406 compatible = "renesas,r8a77970-canfd",
407 "renesas,rcar-gen3-canfd";
414 clock-names = "fck", "canfd", "can_clk";
415 assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
416 assigned-clock-rates = <40000000>;
417 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
431 compatible = "renesas,etheravb-r8a77970",
432 "renesas,etheravb-rcar-gen3";
459 interrupt-names = "ch0", "ch1", "ch2", "ch3",
467 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
469 phy-mode = "rgmii";
471 #address-cells = <1>;
472 #size-cells = <0>;
477 compatible = "renesas,scif-r8a77970",
478 "renesas,rcar-gen3-scif",
485 clock-names = "fck", "brg_int", "scif_clk";
488 dma-names = "tx", "rx", "tx", "rx";
489 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
495 compatible = "renesas,scif-r8a77970",
496 "renesas,rcar-gen3-scif",
503 clock-names = "fck", "brg_int", "scif_clk";
506 dma-names = "tx", "rx", "tx", "rx";
507 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
513 compatible = "renesas,scif-r8a77970",
514 "renesas,rcar-gen3-scif",
521 clock-names = "fck", "brg_int", "scif_clk";
524 dma-names = "tx", "rx", "tx", "rx";
525 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
531 compatible = "renesas,scif-r8a77970",
532 "renesas,rcar-gen3-scif", "renesas,scif";
538 clock-names = "fck", "brg_int", "scif_clk";
541 dma-names = "tx", "rx", "tx", "rx";
542 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
549 compatible = "renesas,vin-r8a77970";
553 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
559 #address-cells = <1>;
560 #size-cells = <0>;
563 #address-cells = <1>;
564 #size-cells = <0>;
570 remote-endpoint= <&csi40vin0>;
577 compatible = "renesas,vin-r8a77970";
581 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
587 #address-cells = <1>;
588 #size-cells = <0>;
591 #address-cells = <1>;
592 #size-cells = <0>;
598 remote-endpoint= <&csi40vin1>;
605 compatible = "renesas,vin-r8a77970";
609 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
615 #address-cells = <1>;
616 #size-cells = <0>;
619 #address-cells = <1>;
620 #size-cells = <0>;
626 remote-endpoint= <&csi40vin2>;
633 compatible = "renesas,vin-r8a77970";
637 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
643 #address-cells = <1>;
644 #size-cells = <0>;
647 #address-cells = <1>;
648 #size-cells = <0>;
654 remote-endpoint= <&csi40vin3>;
660 dmac1: dma-controller@e7300000 {
661 compatible = "renesas,dmac-r8a77970",
662 "renesas,rcar-dmac";
673 interrupt-names = "error",
677 clock-names = "fck";
678 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
680 #dma-cells = <1>;
681 dma-channels = <8>;
688 dmac2: dma-controller@e7310000 {
689 compatible = "renesas,dmac-r8a77970",
690 "renesas,rcar-dmac";
701 interrupt-names = "error",
705 clock-names = "fck";
706 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
708 #dma-cells = <1>;
709 dma-channels = <8>;
717 compatible = "renesas,ipmmu-r8a77970";
719 renesas,ipmmu-main = <&ipmmu_mm 0>;
720 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
721 #iommu-cells = <1>;
725 compatible = "renesas,ipmmu-r8a77970";
727 renesas,ipmmu-main = <&ipmmu_mm 3>;
728 power-domains = <&sysc R8A77970_PD_A3IR>;
729 #iommu-cells = <1>;
733 compatible = "renesas,ipmmu-r8a77970";
737 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
738 #iommu-cells = <1>;
742 compatible = "renesas,ipmmu-r8a77970";
744 renesas,ipmmu-main = <&ipmmu_mm 7>;
745 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
746 #iommu-cells = <1>;
750 compatible = "renesas,ipmmu-r8a77970";
752 renesas,ipmmu-main = <&ipmmu_mm 9>;
753 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
754 #iommu-cells = <1>;
757 gic: interrupt-controller@f1010000 {
758 compatible = "arm,gic-400";
759 #interrupt-cells = <3>;
760 #address-cells = <0>;
761 interrupt-controller;
769 clock-names = "clk";
770 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
779 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
788 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
793 compatible = "renesas,r8a77970-csi2";
797 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
802 #address-cells = <1>;
803 #size-cells = <0>;
806 #address-cells = <1>;
807 #size-cells = <0>;
813 remote-endpoint = <&vin0csi40>;
817 remote-endpoint = <&vin1csi40>;
821 remote-endpoint = <&vin2csi40>;
825 remote-endpoint = <&vin3csi40>;
832 compatible = "renesas,du-r8a77970";
836 clock-names = "du.0";
837 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
843 #address-cells = <1>;
844 #size-cells = <0>;
855 remote-endpoint = <&lvds0_in>;
861 lvds0: lvds-encoder@feb90000 {
862 compatible = "renesas,r8a77970-lvds";
865 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
870 #address-cells = <1>;
871 #size-cells = <0>;
876 remote-endpoint =
895 compatible = "arm,armv8-timer";
896 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,