arm/dts/r8a7792.dtsi

8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
54 			clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
64 			clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
112 			clocks = <&cpg CPG_MOD 402>;
114 			resets = <&cpg 402>;
128 			clocks = <&cpg CPG_MOD 912>;
130 			resets = <&cpg 912>;
143 			clocks = <&cpg CPG_MOD 911>;
145 			resets = <&cpg 911>;
158 			clocks = <&cpg CPG_MOD 910>;
160 			resets = <&cpg 910>;
173 			clocks = <&cpg CPG_MOD 909>;
175 			resets = <&cpg 909>;
188 			clocks = <&cpg CPG_MOD 908>;
190 			resets = <&cpg 908>;
203 			clocks = <&cpg CPG_MOD 907>;
205 			resets = <&cpg 907>;
218 			clocks = <&cpg CPG_MOD 905>;
220 			resets = <&cpg 905>;
233 			clocks = <&cpg CPG_MOD 904>;
235 			resets = <&cpg 904>;
248 			clocks = <&cpg CPG_MOD 921>;
250 			resets = <&cpg 921>;
263 			clocks = <&cpg CPG_MOD 919>;
265 			resets = <&cpg 919>;
278 			clocks = <&cpg CPG_MOD 914>;
280 			resets = <&cpg 914>;
293 			clocks = <&cpg CPG_MOD 913>;
295 			resets = <&cpg 913>;
303 		cpg: clock-controller@e6150000 {  label
304 			compatible = "renesas,r8a7792-cpg-mssr";
339 			clocks = <&cpg CPG_MOD 407>;
341 			resets = <&cpg 407>;
368 			clocks = <&cpg CPG_MOD 931>;
370 			resets = <&cpg 931>;
382 			clocks = <&cpg CPG_MOD 930>;
384 			resets = <&cpg 930>;
396 			clocks = <&cpg CPG_MOD 929>;
398 			resets = <&cpg 929>;
410 			clocks = <&cpg CPG_MOD 928>;
412 			resets = <&cpg 928>;
424 			clocks = <&cpg CPG_MOD 927>;
426 			resets = <&cpg 927>;
438 			clocks = <&cpg CPG_MOD 925>;
440 			resets = <&cpg 925>;
472 			clocks = <&cpg CPG_MOD 219>;
475 			resets = <&cpg 219>;
505 			clocks = <&cpg CPG_MOD 218>;
508 			resets = <&cpg 218>;
518 			clocks = <&cpg CPG_MOD 812>;
520 			resets = <&cpg 812>;
530 			clocks = <&cpg CPG_MOD 917>;
535 			resets = <&cpg 917>;
547 			clocks = <&cpg CPG_MOD 721>,
548 				 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
554 			resets = <&cpg 721>;
563 			clocks = <&cpg CPG_MOD 720>,
564 				 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
570 			resets = <&cpg 720>;
579 			clocks = <&cpg CPG_MOD 719>,
580 				 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
586 			resets = <&cpg 719>;
595 			clocks = <&cpg CPG_MOD 718>,
596 				 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
602 			resets = <&cpg 718>;
611 			clocks = <&cpg CPG_MOD 717>,
612 				 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
618 			resets = <&cpg 717>;
627 			clocks = <&cpg CPG_MOD 716>,
628 				 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
634 			resets = <&cpg 716>;
643 			clocks = <&cpg CPG_MOD 000>;
648 			resets = <&cpg 000>;
659 			clocks = <&cpg CPG_MOD 208>;
664 			resets = <&cpg 208>;
675 			clocks = <&cpg CPG_MOD 916>,
676 				 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
679 			resets = <&cpg 916>;
688 			clocks = <&cpg CPG_MOD 915>,
689 				 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
692 			resets = <&cpg 915>;
701 			clocks = <&cpg CPG_MOD 811>;
703 			resets = <&cpg 811>;
712 			clocks = <&cpg CPG_MOD 810>;
714 			resets = <&cpg 810>;
723 			clocks = <&cpg CPG_MOD 809>;
725 			resets = <&cpg 809>;
734 			clocks = <&cpg CPG_MOD 808>;
736 			resets = <&cpg 808>;
745 			clocks = <&cpg CPG_MOD 805>;
747 			resets = <&cpg 805>;
756 			clocks = <&cpg CPG_MOD 804>;
758 			resets = <&cpg 804>;
770 			clocks = <&cpg CPG_MOD 314>;
772 			resets = <&cpg 314>;
786 			clocks = <&cpg CPG_MOD 408>;
789 			resets = <&cpg 408>;
796 			clocks = <&cpg CPG_MOD 131>;
798 			resets = <&cpg 131>;
805 			clocks = <&cpg CPG_MOD 128>;
807 			resets = <&cpg 128>;
814 			clocks = <&cpg CPG_MOD 127>;
816 			resets = <&cpg 127>;
824 			clocks = <&cpg CPG_MOD 106>;
826 			resets = <&cpg 106>;
835 			clocks = <&cpg CPG_MOD 724>,
836 				 <&cpg CPG_MOD 723>;