Lines Matching +full:0 +full:xfe940000
41 * The external audio clocks are configured as 0 Hz fixed frequency
47 #clock-cells = <0>;
48 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
57 #clock-cells = <0>;
58 clock-frequency = <0>;
64 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #size-cells = <0>;
74 cpu0: cpu@0 {
77 reg = <0>;
161 reg = <0x100>;
172 reg = <0x101>;
183 reg = <0x102>;
194 reg = <0x103>;
202 L2_CA15: cache-controller-0 {
220 #clock-cells = <0>;
222 clock-frequency = <0>;
228 #clock-cells = <0>;
229 clock-frequency = <0>;
232 pmu-0 {
253 #clock-cells = <0>;
255 clock-frequency = <0>;
269 reg = <0 0xe6020000 0 0x0c>;
279 reg = <0 0xe6050000 0 0x50>;
283 gpio-ranges = <&pfc 0 0 32>;
294 reg = <0 0xe6051000 0 0x50>;
298 gpio-ranges = <&pfc 0 32 30>;
309 reg = <0 0xe6052000 0 0x50>;
313 gpio-ranges = <&pfc 0 64 30>;
324 reg = <0 0xe6053000 0 0x50>;
328 gpio-ranges = <&pfc 0 96 32>;
339 reg = <0 0xe6054000 0 0x50>;
343 gpio-ranges = <&pfc 0 128 32>;
354 reg = <0 0xe6055000 0 0x50>;
358 gpio-ranges = <&pfc 0 160 32>;
368 reg = <0 0xe6060000 0 0x250>;
373 reg = <0 0xe6150000 0 0x1000>;
377 #power-domain-cells = <0>;
383 reg = <0 0xe6151000 0 0x188>;
389 reg = <0 0xe6152000 0 0x188>;
395 reg = <0 0xe6160000 0 0x0100>;
400 reg = <0 0xe6180000 0 0x0200>;
408 reg = <0 0xe61c0000 0 0x200>;
409 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
422 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
427 #thermal-sensor-cells = <0>;
433 reg = <0 0xe6280000 0 0x1000>;
443 reg = <0 0xe6290000 0 0x1000>;
452 reg = <0 0xe6740000 0 0x1000>;
462 reg = <0 0xec680000 0 0x1000>;
471 reg = <0 0xfe951000 0 0x1000>;
481 reg = <0 0xffc80000 0 0x1000>;
489 reg = <0 0xe63a0000 0 0x12000>;
494 reg = <0 0xe63c0000 0 0x1000>;
497 ranges = <0 0 0xe63c0000 0x1000>;
499 smp-sram@0 {
501 reg = <0 0x100>;
507 #size-cells = <0>;
510 reg = <0 0xe6508000 0 0x40>;
521 #size-cells = <0>;
524 reg = <0 0xe6518000 0 0x40>;
535 #size-cells = <0>;
538 reg = <0 0xe6530000 0 0x40>;
549 #size-cells = <0>;
552 reg = <0 0xe6540000 0 0x40>;
563 #size-cells = <0>;
567 reg = <0 0xe6500000 0 0x425>;
570 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
571 <&dmac1 0x61>, <&dmac1 0x62>;
580 #size-cells = <0>;
584 reg = <0 0xe6510000 0 0x425>;
587 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
588 <&dmac1 0x65>, <&dmac1 0x66>;
597 #size-cells = <0>;
601 reg = <0 0xe6520000 0 0x425>;
604 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
605 <&dmac1 0x69>, <&dmac1 0x6a>;
614 #size-cells = <0>;
618 reg = <0 0xe60b0000 0 0x425>;
621 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
622 <&dmac1 0x77>, <&dmac1 0x78>;
632 reg = <0 0xe6590000 0 0x100>;
635 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
636 <&usb_dmac1 0>, <&usb_dmac1 1>;
649 reg = <0 0xe6590100 0 0x100>;
651 #size-cells = <0>;
658 usb0: usb-channel@0 {
659 reg = <0>;
671 reg = <0 0xe65a0000 0 0x100>;
685 reg = <0 0xe65b0000 0 0x100>;
699 reg = <0 0xe6700000 0 0x20000>;
732 reg = <0 0xe6720000 0 0x20000>;
765 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
771 #size-cells = <0>;
777 reg = <0 0xe6b10000 0 0x2c>;
780 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
781 <&dmac1 0x17>, <&dmac1 0x18>;
787 #size-cells = <0>;
794 reg = <0 0xe6c40000 0 64>;
798 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
799 <&dmac1 0x21>, <&dmac1 0x22>;
809 reg = <0 0xe6c50000 0 64>;
813 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
814 <&dmac1 0x25>, <&dmac1 0x26>;
824 reg = <0 0xe6c60000 0 64>;
828 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
829 <&dmac1 0x27>, <&dmac1 0x28>;
839 reg = <0 0xe6c20000 0 0x100>;
843 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
844 <&dmac1 0x3d>, <&dmac1 0x3e>;
854 reg = <0 0xe6c30000 0 0x100>;
858 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
859 <&dmac1 0x19>, <&dmac1 0x1a>;
869 reg = <0 0xe6ce0000 0 0x100>;
873 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
874 <&dmac1 0x1d>, <&dmac1 0x1e>;
885 reg = <0 0xe6e60000 0 64>;
890 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
891 <&dmac1 0x29>, <&dmac1 0x2a>;
902 reg = <0 0xe6e68000 0 64>;
907 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
908 <&dmac1 0x2d>, <&dmac1 0x2e>;
919 reg = <0 0xe6e56000 0 64>;
924 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
925 <&dmac1 0x2b>, <&dmac1 0x2c>;
935 reg = <0 0xe62c0000 0 96>;
940 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
941 <&dmac1 0x39>, <&dmac1 0x3a>;
951 reg = <0 0xe62c8000 0 96>;
956 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
957 <&dmac1 0x4d>, <&dmac1 0x4e>;
967 reg = <0 0xe6e20000 0 0x0064>;
969 clocks = <&cpg CPG_MOD 0>;
970 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
971 <&dmac1 0x51>, <&dmac1 0x52>;
974 resets = <&cpg 0>;
976 #size-cells = <0>;
983 reg = <0 0xe6e10000 0 0x0064>;
986 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
987 <&dmac1 0x55>, <&dmac1 0x56>;
992 #size-cells = <0>;
999 reg = <0 0xe6e00000 0 0x0064>;
1002 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1003 <&dmac1 0x41>, <&dmac1 0x42>;
1008 #size-cells = <0>;
1015 reg = <0 0xe6c90000 0 0x0064>;
1018 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1019 <&dmac1 0x45>, <&dmac1 0x46>;
1024 #size-cells = <0>;
1031 reg = <0 0xe6e80000 0 0x1000>;
1044 reg = <0 0xe6e88000 0 0x1000>;
1057 reg = <0 0xe6ef0000 0 0x1000>;
1068 reg = <0 0xe6ef1000 0 0x1000>;
1079 reg = <0 0xe6ef2000 0 0x1000>;
1090 reg = <0 0xe6ef3000 0 0x1000>;
1102 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1107 reg = <0 0xec500000 0 0x1000>, /* SCU */
1108 <0 0xec5a0000 0 0x100>, /* ADG */
1109 <0 0xec540000 0 0x1000>, /* SSIU */
1110 <0 0xec541000 0 0x280>, /* SSI */
1111 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1133 "ssi.1", "ssi.0",
1136 "src.1", "src.0",
1137 "ctu.0", "ctu.1",
1138 "mix.0", "mix.1",
1139 "dvc.0", "dvc.1",
1151 "ssi.1", "ssi.0";
1156 dvc0: dvc-0 {
1157 dmas = <&audma1 0xbc>;
1161 dmas = <&audma1 0xbe>;
1167 mix0: mix-0 { };
1172 ctu00: ctu-0 { };
1183 src0: src-0 {
1185 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1190 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1195 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1200 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1205 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1210 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1215 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1220 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1225 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1230 dmas = <&audma0 0x97>, <&audma1 0xba>;
1236 ssi0: ssi-0 {
1238 dmas = <&audma0 0x01>, <&audma1 0x02>,
1239 <&audma0 0x15>, <&audma1 0x16>;
1244 dmas = <&audma0 0x03>, <&audma1 0x04>,
1245 <&audma0 0x49>, <&audma1 0x4a>;
1250 dmas = <&audma0 0x05>, <&audma1 0x06>,
1251 <&audma0 0x63>, <&audma1 0x64>;
1256 dmas = <&audma0 0x07>, <&audma1 0x08>,
1257 <&audma0 0x6f>, <&audma1 0x70>;
1262 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1263 <&audma0 0x71>, <&audma1 0x72>;
1268 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1269 <&audma0 0x73>, <&audma1 0x74>;
1274 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1275 <&audma0 0x75>, <&audma1 0x76>;
1280 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1281 <&audma0 0x79>, <&audma1 0x7a>;
1286 dmas = <&audma0 0x11>, <&audma1 0x12>,
1287 <&audma0 0x7b>, <&audma1 0x7c>;
1292 dmas = <&audma0 0x13>, <&audma1 0x14>,
1293 <&audma0 0x7d>, <&audma1 0x7e>;
1302 reg = <0 0xec700000 0 0x10000>;
1333 reg = <0 0xec720000 0 0x10000>;
1364 reg = <0 0xee000000 0 0xc00>;
1378 reg = <0 0xee090000 0 0xc00>,
1379 <0 0xee080000 0 0x1100>;
1386 bus-range = <0 0>;
1390 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1391 interrupt-map-mask = <0xff00 0 0 0x7>;
1392 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1393 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1394 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1396 usb@1,0 {
1397 reg = <0x800 0 0 0 0>;
1398 phys = <&usb0 0>;
1402 usb@2,0 {
1403 reg = <0x1000 0 0 0 0>;
1404 phys = <&usb0 0>;
1413 reg = <0 0xee0b0000 0 0xc00>,
1414 <0 0xee0a0000 0 0x1100>;
1425 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1426 interrupt-map-mask = <0xff00 0 0 0x7>;
1427 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1428 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1429 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1439 reg = <0 0xee0d0000 0 0xc00>,
1440 <0 0xee0c0000 0 0x1100>;
1448 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1449 interrupt-map-mask = <0xff00 0 0 0x7>;
1450 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1451 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1452 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1454 usb@1,0 {
1455 reg = <0x20800 0 0 0 0>;
1456 phys = <&usb2 0>;
1460 usb@2,0 {
1461 reg = <0x21000 0 0 0 0>;
1462 phys = <&usb2 0>;
1470 reg = <0 0xee100000 0 0x328>;
1473 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1474 <&dmac1 0xcd>, <&dmac1 0xce>;
1485 reg = <0 0xee120000 0 0x328>;
1488 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1489 <&dmac1 0xc9>, <&dmac1 0xca>;
1500 reg = <0 0xee140000 0 0x100>;
1503 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1504 <&dmac1 0xc1>, <&dmac1 0xc2>;
1515 reg = <0 0xee160000 0 0x100>;
1518 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1519 <&dmac1 0xd3>, <&dmac1 0xd4>;
1530 reg = <0 0xee200000 0 0x80>;
1533 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1534 <&dmac1 0xd1>, <&dmac1 0xd2>;
1546 reg = <0 0xee220000 0 0x80>;
1549 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1550 <&dmac1 0xe1>, <&dmac1 0xe2>;
1562 reg = <0 0xee300000 0 0x2000>;
1573 reg = <0 0xee500000 0 0x2000>;
1584 reg = <0 0xee700000 0 0x400>;
1591 #size-cells = <0>;
1598 #address-cells = <0>;
1600 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1601 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1612 reg = <0 0xfe000000 0 0x80000>;
1615 bus-range = <0x00 0xff>;
1617 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1618 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1619 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1620 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1622 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1623 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1628 interrupt-map-mask = <0 0 0 0>;
1629 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1639 reg = <0 0xfe920000 0 0x8000>;
1648 reg = <0 0xfe928000 0 0x8000>;
1657 reg = <0 0xfe930000 0 0x8000>;
1666 reg = <0 0xfe938000 0 0x8000>;
1675 reg = <0 0xfe940000 0 0x2400>;
1684 reg = <0 0xfe944000 0 0x2400>;
1693 reg = <0 0xfe948000 0 0x2400>;
1703 reg = <0 0xfe980000 0 0x10300>;
1712 reg = <0 0xfeb00000 0 0x70000>;
1718 clock-names = "du.0", "du.1", "du.2";
1723 #size-cells = <0>;
1725 port@0 {
1726 reg = <0>;
1747 reg = <0 0xfeb90000 0 0x1c>;
1755 #size-cells = <0>;
1757 port@0 {
1758 reg = <0>;
1773 reg = <0 0xfeb94000 0 0x1c>;
1781 #size-cells = <0>;
1783 port@0 {
1784 reg = <0>;
1799 reg = <0 0xff000044 0 4>;
1805 reg = <0 0xffca0000 0 0x1004>;
1819 reg = <0 0xe6130000 0 0x1004>;
1839 polling-delay-passive = <0>;
1840 polling-delay = <0>;
1847 hysteresis = <0>;
1867 #clock-cells = <0>;