arm/dts/meson-gxbb.dtsi

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
8 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
9 #include <dt-bindings/clock/gxbb-clkc.h>
10 #include <dt-bindings/clock/gxbb-aoclkc.h>
11 #include <dt-bindings/reset/gxbb-aoclkc.h>
14 	compatible = "amlogic,meson-gxbb";
18 			compatible = "amlogic,meson-gxbb-usb2-phy";
19 			#phy-cells = <0>;
23 			clock-names = "usb_general", "usb";
28 			compatible = "amlogic,meson-gxbb-usb2-phy";
29 			#phy-cells = <0>;
33 			clock-names = "usb_general", "usb";
38 			compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
42 			clock-names = "otg";
44 			phy-names = "usb2-phy";
50 			compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
54 			clock-names = "otg";
56 			phy-names = "usb2-phy";
65 		compatible = "amlogic,meson-gxbb-aobus-pinctrl";
66 		#address-cells = <2>;
67 		#size-cells = <2>;
74 			reg-names = "mux", "pull", "gpio";
75 			gpio-controller;
76 			#gpio-cells = <2>;
77 			gpio-ranges = <&pinctrl_aobus 0 0 14>;
227 		compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
239 		interrupt-names = "gp", "gpmmu", "pp", "pmu",
243 		clock-names = "bus", "core";
250 		assigned-clocks = <&clkc CLKID_GP0_PLL>,
254 		assigned-clock-parents = <0>, /* Do Nothing */
258 		assigned-clock-rates = <744000000>,
267 		compatible = "amlogic,meson-gxbb-spifc";
269 		#address-cells = <1>;
270 		#size-cells = <0>;
278 	clock-names = "core";
282 	compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
289 	clock-names = "stmmaceth", "clkin0", "clkin1";
293 	compatible = "amlogic,meson-gpio-intc",
294 		     "amlogic,meson-gxbb-gpio-intc";
299 	compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
303 	reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
307 	clock-names = "isfr", "iahb", "venci";
311 	clkc: clock-controller {
312 		compatible = "amlogic,gxbb-clkc";
313 		#clock-cells = <1>;
319 	clock-names = "core";
340 		compatible = "amlogic,meson-gxbb-periphs-pinctrl";
341 		#address-cells = <2>;
342 		#size-cells = <2>;
350 			reg-names = "mux", "pull", "pull-enable", "gpio";
351 			gpio-controller;
352 			#gpio-cells = <2>;
353 			gpio-ranges = <&pinctrl_periphs 0 0 119>;
365 		emmc_ds_pins: emmc-ds {
377 			cfg-pull-down {
379 				bias-pull-down;
393 		spi_pins: spi-pins {
402 		spi_ss0_pins: spi-ss0 {
426 			cfg-pull-down {
428 				bias-pull-down;
449 			cfg-pull-down {
451 				bias-pull-down;
534 		eth_rgmii_pins: eth-rgmii {
554 		eth_rmii_pins: eth-rmii {
677 	clock-names = "vpu", "vapb";
684 	assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
690 	assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
696 	assigned-clock-rates = <0>, /* Do Nothing */
705 	compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
710 	clock-names = "clkin", "core", "adc_clk", "adc_sel";
717 	clock-names = "core", "clkin0", "clkin1";
725 	clock-names = "core", "clkin0", "clkin1";
733 	clock-names = "core", "clkin0", "clkin1";
739 	clock-names = "core";
741 	num-cs = <1>;
750 	clock-names = "xtal", "pclk", "baud";
755 	clock-names = "xtal", "pclk", "baud";
760 	clock-names = "xtal", "pclk", "baud";
765 	clock-names = "xtal", "pclk", "baud";
770 	clock-names = "xtal", "pclk", "baud";
774 	compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
775 	power-domains = <&pwrc_vpu>;